From patchwork Thu Mar 19 12:55:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 6049291 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 44F2B9F318 for ; Thu, 19 Mar 2015 12:55:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 60F6620520 for ; Thu, 19 Mar 2015 12:55:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 77141203F1 for ; Thu, 19 Mar 2015 12:55:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752788AbbCSMzA (ORCPT ); Thu, 19 Mar 2015 08:55:00 -0400 Received: from mail-wg0-f47.google.com ([74.125.82.47]:32936 "EHLO mail-wg0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751381AbbCSMy7 (ORCPT ); Thu, 19 Mar 2015 08:54:59 -0400 Received: by wgbcc7 with SMTP id cc7so61537922wgb.0 for ; Thu, 19 Mar 2015 05:54:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=na3s/kZN7U3YbBDh/Hu4SEFlLV1+0Jh/bCYCqdaBOdM=; b=JS4OppY58TVsXzgXjW7r6FZ3t1w5ogcQIWS065S5Qk8yVZnbfMYJDJRulQzHvfZaKN k8GDrzRFqQmdqfFQkzHyNaXa4zSngfujd8JdFVkmsxETTleatCpN98AlYwF/O2Mlfd6k RximcDMntrq2QIhd1x0RigBYxcaE1jttfsbJcZkViMyPt7xF+2Euw8hM+Hk4DWepqgyu ThREYo9zQQXs0dGTOYw358ftMuU/B2Sjz6JEXXe7s/nbKuNasDYtjUAZ0t5lcuIf8iTn rKvp6C0EGPXiZcZ6X2Wd4uAiITm3DppzZwDJy1GqsryGzrS5rLmeyTWxov6ULf0jm5O/ MS2A== X-Gm-Message-State: ALoCoQmdXX8mu25n6iA18pbsYzIdMgz4LX+DvuUI0CV+eu7P3xFAU6E/SwaXIaaU2swWRF9/A53K X-Received: by 10.180.104.200 with SMTP id gg8mr16177716wib.8.1426769697947; Thu, 19 Mar 2015 05:54:57 -0700 (PDT) Received: from mms.wifi.mm-sol.com ([37.157.136.206]) by mx.google.com with ESMTPSA id gt4sm2370589wib.21.2015.03.19.05.54.56 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Mar 2015 05:54:57 -0700 (PDT) From: Georgi Djakov To: ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH] mmc: sdhci-msm: Add support for vendor capabilities registers Date: Thu, 19 Mar 2015 14:55:20 +0200 Message-Id: <1426769720-18657-1-git-send-email-georgi.djakov@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some versions of this controller do not advertise their 3.0v and 8bit bus-width support capabilities. It is required to explicitly set these capabilities for the specific controller versions. Signed-off-by: Georgi Djakov --- Tested on msm8916-mtp board. drivers/mmc/host/sdhci-msm.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3d32ce896b09..80d9ca7cb1e6 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -41,6 +41,15 @@ #define CORE_VENDOR_SPEC 0x10c #define CORE_CLK_PWRSAVE BIT(1) +#define CORE_MCI_VERSION 0x050 +#define CORE_VERSION_MAJOR_SHIFT 28 +#define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT) +#define CORE_VERSION_MINOR_MASK 0xff + +#define CORE_VENDOR_SPEC_CAPABILITIES0 0x11c +#define CORE_8_BIT_SUPPORT BIT(18) +#define CORE_3_0V_SUPPORT BIT(25) + #define CDR_SELEXT_SHIFT 20 #define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT) #define CMUX_SHIFT_PHASE_SHIFT 24 @@ -426,7 +435,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) struct sdhci_msm_host *msm_host; struct resource *core_memres; int ret; - u16 host_version; + u16 host_version, core_minor; + u32 core_version; + u8 core_major; msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); if (!msm_host) @@ -516,6 +527,22 @@ static int sdhci_msm_probe(struct platform_device *pdev) host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT)); + core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION); + core_major = (core_version & CORE_VERSION_MAJOR_MASK) >> + CORE_VERSION_MAJOR_SHIFT; + core_minor = core_version & CORE_VERSION_MINOR_MASK; + dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n", + core_version, core_major, core_minor); + + /* + * Support for 3v and 8bit bus-width is not advertised by some + * controller versions and must be explicitly enabled. + */ + if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) + writel_relaxed(readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES) + | CORE_3_0V_SUPPORT | CORE_8_BIT_SUPPORT, + host->ioaddr + CORE_VENDOR_SPEC_CAPABILITIES0); + ret = sdhci_add_host(host); if (ret) goto clk_disable;