From patchwork Thu Apr 30 17:17:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 6306161 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6CDBDBEEE1 for ; Thu, 30 Apr 2015 17:18:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 61D6F201D3 for ; Thu, 30 Apr 2015 17:18:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D62E52018E for ; Thu, 30 Apr 2015 17:17:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751031AbbD3RRu (ORCPT ); Thu, 30 Apr 2015 13:17:50 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:35846 "EHLO mail-wi0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752574AbbD3RRr (ORCPT ); Thu, 30 Apr 2015 13:17:47 -0400 Received: by wizk4 with SMTP id k4so27950293wiz.1 for ; Thu, 30 Apr 2015 10:17:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u1ujUsdrelBqSf1l+f36Y3yLYeEqXjVQJtUwEs3bkT0=; b=NQerf2w3afhZeU2TRwyH39iMGPi0iKrPKdZGqv5EhrlKa2ZIKUya15jmp4UGFM5o2O 7n+LtK+mfG42viuq5WlaDsF74F35hrv5F/zpQ/D2SxLX2HW/zRIt+yXkQr/S0VSkfkJS 62+PH/RmR5tqTIJ3lhYq+46vPyiX3lGHUIcP/Xga4HDYKRONKdw5jKRZlJguWz6IkkZX jlUTSndXK+pN3EXfoc1Nu/gpyWQQCmUnhVjKfxzXpdcFTaCFyFEGoTZSjy/rkgRjnQW2 BvQbsNfAs9y3SYOvCkNTvwgeG1BEPMsoHaq5dHweTwciglHa6AFfKpHDKuajk472JMDw ut2w== X-Gm-Message-State: ALoCoQk8qFkAoiTcEJw/anUtyn2poO1CG5xhFMEX/cTkBcw7GssG3VwfNpADE8gcsCYXrrwHdfJV X-Received: by 10.194.2.16 with SMTP id 16mr10456347wjq.46.1430414266057; Thu, 30 Apr 2015 10:17:46 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-2-98-219-188.as13285.net. [2.98.219.188]) by mx.google.com with ESMTPSA id k2sm3306083wif.3.2015.04.30.10.17.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Apr 2015 10:17:45 -0700 (PDT) From: Srinivas Kandagatla To: Patrick Lai , Mark Brown Cc: Rob Herring , Pawel Moll , Ian Campbell , Kumar Gala , Banajit Goswami , Kenneth Westfield , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [RFC PATCH 09/14] ASoC: qcom: Add ability to handle interrupts per dma channel Date: Thu, 30 Apr 2015 18:17:42 +0100 Message-Id: <1430414262-11252-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430414148-10869-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1430414148-10869-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds ablity to lpass driver to handle interrupt per dma channel. Without this patch its not possible to use multipl ports on the lpass. Signed-off-by: Srinivas Kandagatla --- sound/soc/qcom/lpass-platform.c | 89 +++++++++++++++++++++++++---------------- sound/soc/qcom/lpass.h | 4 ++ 2 files changed, 58 insertions(+), 35 deletions(-) diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c index 8ab0ac1..c5907d5 100644 --- a/sound/soc/qcom/lpass-platform.c +++ b/sound/soc/qcom/lpass-platform.c @@ -356,27 +356,15 @@ static struct snd_pcm_ops lpass_platform_pcm_ops = { .mmap = lpass_platform_pcmops_mmap, }; -static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) +static irqreturn_t lpass_dma_interrupt_handler( + struct snd_pcm_substream *substream, + struct lpass_data *drvdata, + int chan, u32 interrupts) { - struct snd_pcm_substream *substream = data; struct snd_soc_pcm_runtime *soc_runtime = substream->private_data; - struct lpass_data *drvdata = - snd_soc_platform_get_drvdata(soc_runtime->platform); struct lpass_variant *v = drvdata->variant; - struct lpass_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(soc_runtime); - unsigned int interrupts; irqreturn_t ret = IRQ_NONE; - int rv, chan = pcm_data->rdma_ch; - - rv = regmap_read(drvdata->lpaif_map, - LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &interrupts); - if (rv) { - dev_err(soc_runtime->dev, "%s() error reading from irqstat reg: %d\n", - __func__, rv); - return IRQ_NONE; - } - - interrupts &= LPAIF_IRQ_ALL(chan); + int rv; if (interrupts & LPAIF_IRQ_PER(chan)) { rv = regmap_write(drvdata->lpaif_map, @@ -422,6 +410,30 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) return ret; } +static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) +{ + struct lpass_data *drvdata = data; + struct lpass_variant *v = drvdata->variant; + unsigned int irqs; + int rv, chan; + + rv = regmap_read(drvdata->lpaif_map, + LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs); + if (rv) { + pr_err("%s() error reading from irqstat reg: %d\n", + __func__, rv); + return IRQ_NONE; + } + + /* Handle per channel interrupts */ + for (chan = 0; chan < LPASS_MAX_DMA_CHANNELS; chan++) + if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->substream[chan]) + lpass_dma_interrupt_handler(drvdata->substream[chan], + drvdata, chan, irqs); + + return IRQ_HANDLED; +} + static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *soc_runtime) { @@ -477,6 +489,7 @@ static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) if (IS_ERR_VALUE(data->rdma_ch)) return data->rdma_ch; + drvdata->substream[data->rdma_ch] = substream; data->i2s_port = cpu_dai->driver->id; snd_soc_pcm_set_drvdata(soc_runtime, data); @@ -488,29 +501,12 @@ static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) if (ret) return ret; - ret = devm_request_irq(soc_runtime->dev, drvdata->lpaif_irq, - lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING, - "lpass-irq-lpaif", substream); - if (ret) { - dev_err(soc_runtime->dev, "%s() irq request failed: %d\n", - __func__, ret); - goto err_buf; - } - - /* ensure audio hardware is disabled */ - ret = regmap_write(drvdata->lpaif_map, - LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0); - if (ret) { - dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n", - __func__, ret); - return ret; - } ret = regmap_write(drvdata->lpaif_map, LPAIF_RDMACTL_REG(v, data->rdma_ch), 0); if (ret) { dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", __func__, ret); - return ret; + goto err_buf; } return 0; @@ -530,6 +526,8 @@ static void lpass_platform_pcm_free(struct snd_pcm *pcm) struct lpass_pcm_data *data = snd_soc_pcm_get_drvdata(soc_runtime); struct lpass_variant *v = drvdata->variant; + drvdata->substream[data->rdma_ch] = NULL; + if (v->free_dma_channel) v->free_dma_channel(drvdata, data->rdma_ch); @@ -545,6 +543,8 @@ static struct snd_soc_platform_driver lpass_platform_driver = { int asoc_qcom_lpass_platform_register(struct platform_device *pdev) { struct lpass_data *drvdata = platform_get_drvdata(pdev); + struct lpass_variant *v = drvdata->variant; + int ret; drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif"); if (drvdata->lpaif_irq < 0) { @@ -553,6 +553,25 @@ int asoc_qcom_lpass_platform_register(struct platform_device *pdev) return -ENODEV; } + ret = devm_request_irq(&pdev->dev, drvdata->lpaif_irq, + lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING, + "lpass-irq-lpaif", drvdata); + if (ret) { + dev_err(&pdev->dev, "%s() irq request failed: %d\n", + __func__, ret); + return ret; + } + + /* ensure audio hardware is disabled */ + ret = regmap_write(drvdata->lpaif_map, + LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0); + if (ret) { + dev_err(&pdev->dev, "%s() error writing to irqen reg: %d\n", + __func__, ret); + return ret; + } + + return devm_snd_soc_register_platform(&pdev->dev, &lpass_platform_driver); } diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h index e07ed52..c3016fe 100644 --- a/sound/soc/qcom/lpass.h +++ b/sound/soc/qcom/lpass.h @@ -23,6 +23,7 @@ #define LPASS_AHBIX_CLOCK_FREQUENCY 131072000 #define LPASS_MAX_MI2S_PORTS (4) +#define LPASS_MAX_DMA_CHANNELS (8) /* Both the CPU DAI and platform drivers will access this data */ struct lpass_data { @@ -47,6 +48,9 @@ struct lpass_data { /* SOC specific variations in the LPASS IP integration */ struct lpass_variant *variant; + + /* used it for handling interrupt per dma channel */ + struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; }; /* Vairant data per each SOC */