From patchwork Fri Jul 17 16:53:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 6818051 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 254C19F358 for ; Fri, 17 Jul 2015 16:53:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3C13D207C5 for ; Fri, 17 Jul 2015 16:53:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 29503207B4 for ; Fri, 17 Jul 2015 16:53:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753299AbbGQQxu (ORCPT ); Fri, 17 Jul 2015 12:53:50 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38380 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752093AbbGQQxt (ORCPT ); Fri, 17 Jul 2015 12:53:49 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3CED81405F7; Fri, 17 Jul 2015 16:53:49 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 277B61405F9; Fri, 17 Jul 2015 16:53:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from blr-ubuntu-32.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 024F71405F3; Fri, 17 Jul 2015 16:53:45 +0000 (UTC) From: Sricharan R To: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, will.deacon@arm.com, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, mitchelh@codeaurora.org Cc: sricharan@codeaurora.org Subject: [RFC PATCH 4/4] iommu/arm-smmu: Add support for specifying regulators Date: Fri, 17 Jul 2015 22:23:25 +0530 Message-Id: <1437152005-25092-5-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1437152005-25092-1-git-send-email-sricharan@codeaurora.org> References: <1437152005-25092-1-git-send-email-sricharan@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mitchel Humpherys This adds the support to turn on the regulators required for SMMUs. It is turned on during the SMMU probe and remains 'on' till the device exists. Signed-off-by: Sricharan R --- .../devicetree/bindings/iommu/arm,smmu.txt | 3 ++ drivers/iommu/arm-smmu.c | 48 +++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index c2cf4fe..433d778 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -60,6 +60,9 @@ conditions. Documentation/devicetree/bindings/clock/clock-bindings.txt for more info. +- vdd-supply : Phandle of the regulator that should be powered on during + SMMU register access. + Example: smmu { diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 80d56f0a..c92de50 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -326,6 +326,8 @@ struct arm_smmu_device { int num_clocks; struct clk **clocks; + + struct regulator *regulator; }; struct arm_smmu_cfg { @@ -559,6 +561,22 @@ static void __arm_smmu_free_bitmap(unsigned long *map, int idx) clear_bit(idx, map); } +static int arm_smmu_enable_regulators(struct arm_smmu_device *smmu) +{ + if (!smmu->regulator) + return 0; + + return regulator_enable(smmu->regulator); +} + +static int arm_smmu_disable_regulators(struct arm_smmu_device *smmu) +{ + if (!smmu->regulator) + return 0; + + return regulator_disable(smmu->regulator); +} + /* Wait for any pending TLB invalidations to complete */ static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu) { @@ -1583,6 +1601,20 @@ static int arm_smmu_id_size_to_bits(int size) } } +static int arm_smmu_init_regulators(struct arm_smmu_device *smmu) +{ + struct device *dev = smmu->dev; + + if (!of_get_property(dev->of_node, "vdd-supply", NULL)) + return 0; + + smmu->regulator = devm_regulator_get(dev, "vdd"); + if (IS_ERR(smmu->regulator)) + return PTR_ERR(smmu->regulator); + + return 0; +} + static int arm_smmu_init_clocks(struct arm_smmu_device *smmu) { const char *cname; @@ -1841,11 +1873,21 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) smmu->irqs[i] = irq; } + err = arm_smmu_init_regulators(smmu); + if (err) + goto out_put_masters; + err = arm_smmu_init_clocks(smmu); if (err) goto out_put_masters; - arm_smmu_enable_clocks(smmu); + err = arm_smmu_enable_regulators(smmu); + if (err) + goto out_put_masters; + + err = arm_smmu_enable_clocks(smmu); + if (err) + goto out_disable_regulators; err = arm_smmu_device_cfg_probe(smmu); if (err) @@ -1908,6 +1950,9 @@ out_free_irqs: out_disable_clocks: arm_smmu_disable_clocks(smmu); +out_disable_regulators: + arm_smmu_disable_regulators(smmu); + out_put_masters: for (node = rb_first(&smmu->masters); node; node = rb_next(node)) { struct arm_smmu_master *master @@ -1953,6 +1998,7 @@ static int arm_smmu_device_remove(struct platform_device *pdev) /* Turn the thing off */ writel(sCR0_CLIENTPD, ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0); arm_smmu_disable_clocks(smmu); + arm_smmu_disable_regulators(smmu); return 0; }