From patchwork Mon Jul 27 13:52:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 6874111 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5F614C05AC for ; Mon, 27 Jul 2015 13:53:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6696820534 for ; Mon, 27 Jul 2015 13:53:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6AE8B20351 for ; Mon, 27 Jul 2015 13:53:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754157AbbG0NwU (ORCPT ); Mon, 27 Jul 2015 09:52:20 -0400 Received: from mail-wi0-f180.google.com ([209.85.212.180]:34265 "EHLO mail-wi0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754142AbbG0NwR (ORCPT ); Mon, 27 Jul 2015 09:52:17 -0400 Received: by wibud3 with SMTP id ud3so141131370wib.1 for ; Mon, 27 Jul 2015 06:52:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3mOWKbgspckpDK0hnRexGRbkqBgomAi8XS3N0yxYAZI=; b=QwnUzOGB/M1ATcEjvF0vm7UtrK+2RGOI/iROU0addCrIxZ6LQNrnGgHepnR0DyFIs9 tj5/QONSKTjI+bLqzgRYHXu/e3+2yRiK35rQddOphcv577m5w9C0HNSIgFwq0meSaPXv SzzYhGAGMjAjeca4y8lpaeshQ3Hk6YezVssK8v1W1DiZV2SIK5Kn8f/vuNSojMczNfHX q7W5vOPbaVpDyhZiBpFPKBg/skrxYt3BzNyPqv25cC0hfIKMQOvp0AHII0WOIxgo1Y2K cBxUp5WYHEM2WIZRFFyx8W2QCxE3DbslGYIcD6IlD3D+9xXtO4SSX4UrI0QWhBLXEuN6 50mA== X-Gm-Message-State: ALoCoQk5OMa7ihQVc17BeMmBfLVww6bvZLKTNYJIgCP93HG/nzAPzMcP1ttT3qhnk4qbvs4yyHrk X-Received: by 10.180.94.7 with SMTP id cy7mr22815396wib.79.1438005135681; Mon, 27 Jul 2015 06:52:15 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-147-3-201.as13285.net. [78.147.3.201]) by smtp.gmail.com with ESMTPSA id bm9sm13793545wib.10.2015.07.27.06.52.13 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Jul 2015 06:52:14 -0700 (PDT) From: Srinivas Kandagatla To: agross@codeaurora.org, linux-arm-msm@vger.kernel.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pramod Gurav , Srinivas Kandagatla Subject: [PATCH v1 6/7] ARM: dts: apq8064: Add DT support for GSBI6 and for UART pin mux Date: Mon, 27 Jul 2015 14:52:10 +0100 Message-Id: <1438005130-16519-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438004945-16175-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1438004945-16175-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pramod Gurav This change adds DT support for GSBI6 and muxes the gpio pins as UART lines. Also defines a alias for serial port on these lines. Signed-off-by: Pramod Gurav [Srinivas Kandagatla]: fix pinctrl location and rename alias correctly Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 13 +++++++++++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 30 +++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index cdfcf02..ec6a736 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -7,6 +7,7 @@ aliases { serial0 = &gsbi7_serial; + serial1 = &gsbi6_serial; }; soc { @@ -125,6 +126,18 @@ }; }; + gsbi@16500000 { + status = "ok"; + qcom,mode = ; + + serial@16540000 { + status = "ok"; + + pinctrl-names = "default"; + pinctrl-0 = <&uart_pins>; + }; + }; + gsbi@16600000 { status = "ok"; qcom,mode = ; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index da214f1..b7c282b 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -126,6 +126,13 @@ function = "gsbi3"; }; }; + + uart_pins: uart_pins { + mux { + pins = "gpio14", "gpio15", "gpio16", "gpio17"; + function = "gsbi6"; + }; + }; }; intc: interrupt-controller@2000000 { @@ -248,7 +255,6 @@ #address-cells = <1>; #size-cells = <1>; ranges; - i2c3: i2c@16280000 { compatible = "qcom,i2c-qup-v1.1.1"; reg = <0x16280000 0x1000>; @@ -259,6 +265,28 @@ }; }; + gsbi6: gsbi@16500000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <6>; + reg = <0x16500000 0x03>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gsbi6_serial: serial@16540000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16540000 0x100>, + <0x16500000 0x03>; + interrupts = <0 156 0x0>; + clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0";