From patchwork Mon Aug 3 05:08:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 6927171 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 74DC5C05AD for ; Mon, 3 Aug 2015 05:09:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9693A20547 for ; Mon, 3 Aug 2015 05:09:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DC8E72053C for ; Mon, 3 Aug 2015 05:09:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752518AbbHCFIb (ORCPT ); Mon, 3 Aug 2015 01:08:31 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59643 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751006AbbHCFI3 (ORCPT ); Mon, 3 Aug 2015 01:08:29 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id AD39B140260; Mon, 3 Aug 2015 05:08:29 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 985FE140271; Mon, 3 Aug 2015 05:08:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (unknown [202.46.23.61]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 28D7A140260; Mon, 3 Aug 2015 05:08:28 +0000 (UTC) From: Archit Taneja To: linux-mtd@lists.infradead.org, dehrenberg@google.com, cernekee@gmail.com, computersforpeace@gmail.com Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, Archit Taneja Subject: [PATCH v3 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Date: Mon, 3 Aug 2015 10:38:14 +0530 Message-Id: <1438578498-32254-2-git-send-email-architt@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1438578498-32254-1-git-send-email-architt@codeaurora.org> References: <1421419702-17812-1-git-send-email-architt@codeaurora.org> <1438578498-32254-1-git-send-email-architt@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some controllers can access the factory bad block marker from OOB only when they read it in raw mode. When ECC is enabled, these controllers discard reading/writing bad block markers, preventing access to them altogether. The bbt driver assumes MTD_OPS_PLACE_OOB when scanning for bad blocks. This results in the nand driver's ecc->read_oob() op to be called, which works with ECC enabled. Create a new BBT option flag that tells nand_bbt to force the mode to MTD_OPS_RAW. This would result in the correct op being called for the underlying nand controller driver. Reviewed-by: Andy Gross Signed-off-by: Archit Taneja --- drivers/mtd/nand/nand_base.c | 6 +++++- drivers/mtd/nand/nand_bbt.c | 6 +++++- include/linux/mtd/bbm.h | 7 +++++++ 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ceb68ca..0a0c524 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -394,7 +394,11 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) } else { ops.len = ops.ooblen = 1; } - ops.mode = MTD_OPS_PLACE_OOB; + + if (unlikely(chip->bbt_options & NAND_BBT_ACCESS_BBM_RAW)) + ops.mode = MTD_OPS_RAW; + else + ops.mode = MTD_OPS_PLACE_OOB; /* Write to first/last page(s) if necessary */ if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 63a1a36..f2d89c9 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -420,7 +420,11 @@ static int scan_block_fast(struct mtd_info *mtd, struct nand_bbt_descr *bd, ops.oobbuf = buf; ops.ooboffs = 0; ops.datbuf = NULL; - ops.mode = MTD_OPS_PLACE_OOB; + + if (unlikely(bd->options & NAND_BBT_ACCESS_BBM_RAW)) + ops.mode = MTD_OPS_RAW; + else + ops.mode = MTD_OPS_PLACE_OOB; for (j = 0; j < numpages; j++) { /* diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index 36bb6a5..f67f84a 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -116,6 +116,13 @@ struct nand_bbt_descr { #define NAND_BBT_NO_OOB_BBM 0x00080000 /* + * Force MTD_OPS_RAW mode when trying to access bad block markes from OOB. To + * be used by controllers which can access BBM only when ECC is disabled, i.e, + * when in RAW access mode + */ +#define NAND_BBT_ACCESS_BBM_RAW 0x00100000 + +/* * Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr * was allocated dynamicaly and must be freed in nand_release(). Has no meaning * in nand_chip.bbt_options.