From patchwork Thu Sep 3 18:30:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hai Li X-Patchwork-Id: 7118441 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 76DE99F1CD for ; Thu, 3 Sep 2015 18:31:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 322C1205C6 for ; Thu, 3 Sep 2015 18:31:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1EEE4203B7 for ; Thu, 3 Sep 2015 18:31:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756721AbbICSbD (ORCPT ); Thu, 3 Sep 2015 14:31:03 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45158 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755290AbbICSbC (ORCPT ); Thu, 3 Sep 2015 14:31:02 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 3465D141675; Thu, 3 Sep 2015 18:31:01 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 1BD951416A8; Thu, 3 Sep 2015 18:31:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from yyzubuntu32.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: hali@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7E0AB141675; Thu, 3 Sep 2015 18:30:59 +0000 (UTC) From: Hai Li To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com, Hai Li Subject: [PATCH] drm/msm/dsi: Parse lane swap information from DT Date: Thu, 3 Sep 2015 14:30:49 -0400 Message-Id: <1441305049-14610-1-git-send-email-hali@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Lane swap configuration is based on the board design. This change allows the DSI host to get this information from device tree, instead of hardcoding in driver. Signed-off-by: Hai Li --- Documentation/devicetree/bindings/drm/msm/dsi.txt | 13 ++++++ drivers/gpu/drm/msm/dsi/dsi_host.c | 49 +++++++++++++++++------ 2 files changed, 49 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/drm/msm/dsi.txt b/Documentation/devicetree/bindings/drm/msm/dsi.txt index d56923c..febcc51 100644 --- a/Documentation/devicetree/bindings/drm/msm/dsi.txt +++ b/Documentation/devicetree/bindings/drm/msm/dsi.txt @@ -44,6 +44,17 @@ Optional properties: - port: DSI controller output port. This contains one endpoint subnode, with its remote-endpoint set to the phandle of the connected panel's endpoint. See Documentation/devicetree/bindings/graph.txt for device graph info. +- qcom,dsi-logical-lane-swap: Character string to swap logical lane to physical + lane mapping. Supported lane mappings: + "0123": Logic 0->Phys 0; Logic 1->Phys 1; Logic 2->Phys 2; Logic 3->Phys 3; + "3012": Logic 3->Phys 0; Logic 0->Phys 1; Logic 1->Phys 2; Logic 2->Phys 3; + "2301": Logic 2->Phys 0; Logic 3->Phys 1; Logic 0->Phys 2; Logic 1->Phys 3; + "1230": Logic 1->Phys 0; Logic 2->Phys 1; Logic 3->Phys 2; Logic 0->Phys 3; + "0321": Logic 0->Phys 0; Logic 3->Phys 1; Logic 2->Phys 2; Logic 1->Phys 3; + "1032": Logic 1->Phys 0; Logic 0->Phys 1; Logic 3->Phys 2; Logic 2->Phys 3; + "2103": Logic 2->Phys 0; Logic 1->Phys 1; Logic 0->Phys 2; Logic 3->Phys 3; + "3210": Logic 3->Phys 0; Logic 2->Phys 1; Logic 1->Phys 2; Logic 0->Phys 3; + Default value is "0123", which means no lane swap. DSI PHY: Required properties: @@ -129,6 +140,8 @@ Example: remote-endpoint = <&panel_in>; }; }; + + qcom,dsi-logical-lane-swap = "0123"; }; mdss_dsi_phy0: qcom,mdss_dsi_phy@fd922a00 { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 8d82973f..eaba417 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -131,6 +131,7 @@ struct msm_dsi_host { enum mipi_dsi_pixel_format format; unsigned long mode_flags; + u32 dlane_swap; u32 dma_cmd_ctrl_restore; bool registered; @@ -684,19 +685,9 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable, data = DSI_CTRL_CLK_EN; DBG("lane number=%d", msm_host->lanes); - if (msm_host->lanes == 2) { - data |= DSI_CTRL_LANE1 | DSI_CTRL_LANE2; - /* swap lanes for 2-lane panel for better performance */ - dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL, - DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(LANE_SWAP_1230)); - } else { - /* Take 4 lanes as default */ - data |= DSI_CTRL_LANE0 | DSI_CTRL_LANE1 | DSI_CTRL_LANE2 | - DSI_CTRL_LANE3; - /* Do not swap lanes for 4-lane panel */ - dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL, - DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(LANE_SWAP_0123)); - } + data |= ((DSI_CTRL_LANE0 << msm_host->lanes) - DSI_CTRL_LANE0); + dsi_write(msm_host, REG_DSI_LANE_SWAP_CTRL, + DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(msm_host->dlane_swap)); if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) dsi_write(msm_host, REG_DSI_LANE_CTRL, @@ -1289,6 +1280,9 @@ static int dsi_host_attach(struct mipi_dsi_host *host, struct msm_dsi_host *msm_host = to_msm_dsi_host(host); int ret; + if (dsi->lanes > 4 || dsi->channel > 3) + return -EINVAL; + msm_host->channel = dsi->channel; msm_host->lanes = dsi->lanes; msm_host->format = dsi->format; @@ -1344,6 +1338,33 @@ static struct mipi_dsi_host_ops dsi_host_ops = { .transfer = dsi_host_transfer, }; +static void dsi_parse_dlane_swap(struct msm_dsi_host *msm_host, + struct device_node *np) +{ + const char *lane_swap; + + lane_swap = of_get_property(np, "qcom,dsi-logical-lane-swap", NULL); + + if (!lane_swap) + msm_host->dlane_swap = LANE_SWAP_0123; + else if (!strncmp(lane_swap, "3012", 5)) + msm_host->dlane_swap = LANE_SWAP_3012; + else if (!strncmp(lane_swap, "2301", 5)) + msm_host->dlane_swap = LANE_SWAP_2301; + else if (!strncmp(lane_swap, "1230", 5)) + msm_host->dlane_swap = LANE_SWAP_1230; + else if (!strncmp(lane_swap, "0321", 5)) + msm_host->dlane_swap = LANE_SWAP_0321; + else if (!strncmp(lane_swap, "1032", 5)) + msm_host->dlane_swap = LANE_SWAP_1032; + else if (!strncmp(lane_swap, "2103", 5)) + msm_host->dlane_swap = LANE_SWAP_2103; + else if (!strncmp(lane_swap, "3210", 5)) + msm_host->dlane_swap = LANE_SWAP_3210; + else + msm_host->dlane_swap = LANE_SWAP_0123; +} + static int dsi_host_parse_dt(struct msm_dsi_host *msm_host) { struct device *dev = &msm_host->pdev->dev; @@ -1358,6 +1379,8 @@ static int dsi_host_parse_dt(struct msm_dsi_host *msm_host) return ret; } + dsi_parse_dlane_swap(msm_host, np); + /* * Get the first endpoint node. In our case, dsi has one output port * to which the panel is connected. Don't return an error if a port