From patchwork Sat Sep 12 13:03:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ivan T. Ivanov" X-Patchwork-Id: 7166531 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7B2E69F32B for ; Sat, 12 Sep 2015 13:03:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 94FA820855 for ; Sat, 12 Sep 2015 13:03:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B2FE720827 for ; Sat, 12 Sep 2015 13:03:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754955AbbILNDx (ORCPT ); Sat, 12 Sep 2015 09:03:53 -0400 Received: from mail-wi0-f178.google.com ([209.85.212.178]:34125 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754943AbbILNDv (ORCPT ); Sat, 12 Sep 2015 09:03:51 -0400 Received: by wicfx3 with SMTP id fx3so91230503wic.1 for ; Sat, 12 Sep 2015 06:03:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=qrP18nwz6asmwHekqg1BPkNC1K/q4GQzbB22dltfzzU=; b=UE4q9xei4cBzC3npH7DO6A2+HS9/eqFAjwfT+313vgKO6HzXHMP3nPaVZihGLns2+u c5PUrk3pCmJNClt+TSM471Y13OzhZoZordMsDuiBNBgaz5CYWM0kmuRFex365jI+Ip1+ fm5HiQQ9cDN7T4Zm61YUkOcX9b0UDlywoDJAe/10bqf/R0Hbs3ZYUA1kHlq4yHeV+XKj p5r9ZM5t6SEdVybtnn7ha5Jrpp1YM85w5EJw3pSvyy3tEIXZ0c8agogKGF6gRp6zAxaY C9RUbe7wVDZ4H5hyS9DJjdkYRxQ+ARsRfrTHwC5w5Tf5ptbl1+6hcbybg5EE+juCRjIJ QTYA== X-Gm-Message-State: ALoCoQk6Md4bMKdO8OPLcAGF+lqb8KNiiurdX6HHn2YgAvnBjKqy0herIk/hKlKkizzLhU4VAbJc X-Received: by 10.180.8.9 with SMTP id n9mr6346169wia.40.1442063030470; Sat, 12 Sep 2015 06:03:50 -0700 (PDT) Received: from localhost.localdomain ([37.157.136.206]) by smtp.googlemail.com with ESMTPSA id gc8sm4249591wib.2.2015.09.12.06.03.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 Sep 2015 06:03:50 -0700 (PDT) From: "Ivan T. Ivanov" To: Andy Gross Cc: Srinivas Kandagatla , Stanimir Varbanov , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 1/2] arm64: dts: qcom: 8x16: Add UART1 configuration nodes Date: Sat, 12 Sep 2015 16:03:14 +0300 Message-Id: <1442062995-13523-1-git-send-email-ivan.ivanov@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add devicetree bindings for UART1 pins and device controller with DMA channel specifiers. Signed-off-by: Ivan T. Ivanov --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 29 +++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 ++++++++++++ 2 files changed, 41 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi index 568956859088..1330a7a6bcf1 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi @@ -13,6 +13,35 @@ &msmgpio { + blsp1_uart1_default: blsp1_uart1_default { + pinmux { + function = "blsp_uart1"; + // TX, RX, CTS_N, RTS_N + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; + }; + pinconf { + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp1_uart1_sleep: blsp1_uart1_sleep { + pinmux { + function = "blsp_uart1"; + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; + }; + pinconf { + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; + drive-strength = <2>; + bias-pull-down; + }; + }; + blsp1_uart2_default: blsp1_uart2_default { pinmux { function = "blsp_uart2"; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5911de008dd5..f10ff7a2d0e3 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,6 +102,18 @@ reg = <0x1800000 0x80000>; }; + blsp1_uart1: serial@78af000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78af000 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + dmas = <&blsp_dma 1>, <&blsp_dma 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + blsp1_uart2: serial@78b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b0000 0x200>;