From patchwork Tue Sep 15 12:41:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephane Viau X-Patchwork-Id: 7184451 Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5AC22BEEC1 for ; Tue, 15 Sep 2015 12:47:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E5B5C206A7 for ; Tue, 15 Sep 2015 12:47:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 11AC92068E for ; Tue, 15 Sep 2015 12:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751797AbbIOMqw (ORCPT ); Tue, 15 Sep 2015 08:46:52 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48952 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752444AbbIOMnh (ORCPT ); Tue, 15 Sep 2015 08:43:37 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 74D0A1400CC; Tue, 15 Sep 2015 12:43:36 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 5D311140121; Tue, 15 Sep 2015 12:43:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from yyzubuntu31.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sviau@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id DFC421400CC; Tue, 15 Sep 2015 12:43:34 +0000 (UTC) From: Stephane Viau To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com, Stephane Viau Subject: [PATCH 02/10] drm/msm/mdp5: Disable hardware translation table walks (MSM8996) Date: Tue, 15 Sep 2015 08:41:45 -0400 Message-Id: <1442320913-3248-3-git-send-email-sviau@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1442320913-3248-1-git-send-email-sviau@codeaurora.org> References: <1442320913-3248-1-git-send-email-sviau@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On certain targets (eg, MSM8996) we need to set the following domain attribute for correct operation of the SMMU: DOMAIN_ATTR_COHERENT_HTW_DISABLE. Setting that attribute is very important on 8996. Without it, we would see crazy translation faults. Note: There could be support for coherent hardware table walks in the future Signed-off-by: Stephane Viau --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c index bbab6e6..14ac20a 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c @@ -584,6 +584,8 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev) mdelay(16); if (config->platform.iommu) { + int rev = mdp5_cfg_get_hw_rev(mdp5_kms->cfg); + mmu = msm_iommu_new(&pdev->dev, config->platform.iommu); if (IS_ERR(mmu)) { ret = PTR_ERR(mmu); @@ -591,6 +593,19 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev) goto fail; } + /* + * On certain targets (8996, for example) we need to set the + * following domain attribute for correct operation of the SMMU; + * Without it, we would see crazy translation faults.. + */ + if (rev == 7) { + int disable_htw = 1; + + iommu_domain_set_attr(config->platform.iommu, + DOMAIN_ATTR_COHERENT_HTW_DISABLE, &disable_htw); + DBG("coherent hardware translation table walks is off"); + } + ret = mmu->funcs->attach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports)); if (ret) {