From patchwork Fri Sep 18 13:18:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ivan T. Ivanov" X-Patchwork-Id: 7216271 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 89050BEEC1 for ; Fri, 18 Sep 2015 13:22:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 37726206F4 for ; Fri, 18 Sep 2015 13:22:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6224E207F5 for ; Fri, 18 Sep 2015 13:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753472AbbIRNWT (ORCPT ); Fri, 18 Sep 2015 09:22:19 -0400 Received: from mail-wi0-f181.google.com ([209.85.212.181]:35134 "EHLO mail-wi0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753425AbbIRNS7 (ORCPT ); Fri, 18 Sep 2015 09:18:59 -0400 Received: by wicge5 with SMTP id ge5so32569280wic.0 for ; Fri, 18 Sep 2015 06:18:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jA8E/yJfVJgJmfWKzP+OmLGPTLtbkvFjEjMyAP6yH/A=; b=SEVxiH51TnIFXuCex6iVPiNeI9IUufm312mS8r0643W1YU/yakmfrYvI84mZkAXCCi DCI1ilLo16O2kl7ictflIwjD7EnmHPX8rpncyQSz3bVB9Pz3LZn9hi6O5rkC3TQxLeNq Dl5PyKPi/rBVhW57maKRlmp+BMSgZEbhog7zyT8dUcY+bx/HwC58d6d0zxlMaxkT0+Lu wK+6tQL9KiPURwdh0w3uhEtQIiDrYS/ctF4+81ONn4M92c8rIsOrYuHxI776ku00KuYY 86ytTTsvQoSoGNdqflLSsDEagi4EJ5CIHAnq6NQ8u8usvchJ+EXemu7SPNjzhX3w/vu+ ogPQ== X-Gm-Message-State: ALoCoQmATwt0liw0n080DN92qC32l56UUKScP3DcPBLj/Ka7d8TzFF2wl1Fg1gHJZoQ/r6PXml3O X-Received: by 10.180.188.12 with SMTP id fw12mr16745206wic.69.1442582338591; Fri, 18 Sep 2015 06:18:58 -0700 (PDT) Received: from mms-0439.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.googlemail.com with ESMTPSA id wj4sm8877884wjb.10.2015.09.18.06.18.57 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Sep 2015 06:18:58 -0700 (PDT) From: "Ivan T. Ivanov" To: Andy Gross Cc: Srinivas Kandagatla , Stanimir Varbanov , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 1/2] arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations Date: Fri, 18 Sep 2015 16:18:53 +0300 Message-Id: <1442582334-29387-2-git-send-email-ivan.ivanov@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442582334-29387-1-git-send-email-ivan.ivanov@linaro.org> References: <1442582334-29387-1-git-send-email-ivan.ivanov@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add devicetree bindings for UART1 CTS_N and RTS_N pins. Signed-off-by: Ivan T. Ivanov --- arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi index 42941b977c48..f9b74bb14d31 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi @@ -16,10 +16,13 @@ blsp1_uart1_default: blsp1_uart1_default { pinmux { function = "blsp_uart1"; - pins = "gpio0", "gpio1"; + // TX, RX, CTS_N, RTS_N + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; }; pinconf { - pins = "gpio0", "gpio1"; + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; drive-strength = <16>; bias-disable; }; @@ -28,10 +31,12 @@ blsp1_uart1_sleep: blsp1_uart1_sleep { pinmux { function = "gpio"; - pins = "gpio0", "gpio1"; + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; }; pinconf { - pins = "gpio0", "gpio1"; + pins = "gpio0", "gpio1", + "gpio2", "gpio3"; drive-strength = <2>; bias-pull-down; };