From patchwork Wed Mar 23 22:05:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew McClintock X-Patchwork-Id: 8654791 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 012CD9F3D1 for ; Wed, 23 Mar 2016 22:06:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2081F203F3 for ; Wed, 23 Mar 2016 22:06:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2059E203EB for ; Wed, 23 Mar 2016 22:06:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932605AbcCWWGW (ORCPT ); Wed, 23 Mar 2016 18:06:22 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53621 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932573AbcCWWGV (ORCPT ); Wed, 23 Mar 2016 18:06:21 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 208BF61640; Wed, 23 Mar 2016 22:06:20 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 09EF261631; Wed, 23 Mar 2016 22:06:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,HK_RANDOM_FROM, RCVD_IN_DNSWL_HI,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from mmcclint1-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mmcclint@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 45D906160B; Wed, 23 Mar 2016 22:06:16 +0000 (UTC) From: Matthew McClintock To: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org Cc: qca-upstream.external@qca.qualcomm.com, Matthew McClintock , David Brown , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , linux-soc@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 17/17] qcom: ipq4019: add DMA nodes to ipq4019 SoC and DK01 device tree Date: Wed, 23 Mar 2016 17:05:12 -0500 Message-Id: <1458770712-10880-18-git-send-email-mmcclint@codeaurora.org> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> References: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the blsp_dma node to the device tree and the required properties for using DMA with serial Signed-off-by: Matthew McClintock --- arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 4 ++++ arch/arm/boot/dts/qcom-ipq4019.dtsi | 15 +++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi index 2c347ad..b9457dd2 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi @@ -72,6 +72,10 @@ }; }; + blsp_dma: dma@7884000 { + status = "ok"; + }; + spi_0: spi@78b5000 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 3cd42c0..5c08d19 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -123,6 +123,17 @@ interrupts = <0 208 0>; }; + blsp_dma: dma@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x07884000 0x23000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + status = "disabled"; + }; + spi_0: spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b5000 0x600>; @@ -224,6 +235,8 @@ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; + dmas = <&blsp_dma 1>, <&blsp_dma 0>; + dma-names = "rx", "tx"; }; serial@78b0000 { @@ -234,6 +247,8 @@ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; + dmas = <&blsp_dma 3>, <&blsp_dma 2>; + dma-names = "rx", "tx"; }; watchdog@b017000 {