From patchwork Wed Mar 23 22:04:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew McClintock X-Patchwork-Id: 8655091 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: X-Original-To: patchwork-linux-arm-msm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4AD3F9F3D1 for ; Wed, 23 Mar 2016 22:10:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7137B20411 for ; Wed, 23 Mar 2016 22:10:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7569220270 for ; Wed, 23 Mar 2016 22:10:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754557AbcCWWFs (ORCPT ); Wed, 23 Mar 2016 18:05:48 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53181 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754068AbcCWWFq (ORCPT ); Wed, 23 Mar 2016 18:05:46 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 1A035615D4; Wed, 23 Mar 2016 22:05:46 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0D96E61515; Wed, 23 Mar 2016 22:05:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,HK_RANDOM_FROM, RCVD_IN_DNSWL_HI,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from mmcclint1-ubuntu.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mmcclint@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A5192615CF; Wed, 23 Mar 2016 22:05:44 +0000 (UTC) From: Matthew McClintock To: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org Cc: qca-upstream.external@qca.qualcomm.com, Matthew McClintock , linus.walleij@linaro.org, bjorn.andersson@linaro.org, Sricharan R , Rob Herring , Mathieu Olivari , Varadarajan Narayanan , linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 03/17] pinctrl: qcom: ipq4019: fix register offsets Date: Wed, 23 Mar 2016 17:04:58 -0500 Message-Id: <1458770712-10880-4-git-send-email-mmcclint@codeaurora.org> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> References: <1458770712-10880-1-git-send-email-mmcclint@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For this SoC the register offsets changed from previous versions to be separated by a larger amount. CC: linus.walleij@linaro.org CC: bjorn.andersson@linaro.org Signed-off-by: Matthew McClintock Acked-by: bjorn.andersson@linaro.org --- drivers/pinctrl/qcom/pinctrl-ipq4019.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c index cb9f16a..b68ae42 100644 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c @@ -254,11 +254,11 @@ DECLARE_QCA_GPIO_PINS(99); qca_mux_##f14 \ }, \ .nfuncs = 15, \ - .ctl_reg = 0x1000 + 0x10 * id, \ - .io_reg = 0x1004 + 0x10 * id, \ - .intr_cfg_reg = 0x1008 + 0x10 * id, \ - .intr_status_reg = 0x100c + 0x10 * id, \ - .intr_target_reg = 0x400 + 0x4 * id, \ + .ctl_reg = 0x0 + 0x1000 * id, \ + .io_reg = 0x4 + 0x1000 * id, \ + .intr_cfg_reg = 0x8 + 0x1000 * id, \ + .intr_status_reg = 0xc + 0x1000 * id, \ + .intr_target_reg = 0x8 + 0x1000 * id, \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \