diff mbox

[RFC,1/4] arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support

Message ID 1467938467-21607-2-git-send-email-jmcnicol@redhat.com (mailing list archive)
State Not Applicable, archived
Delegated to: Andy Gross
Headers show

Commit Message

Jeremy McNicoll July 8, 2016, 12:41 a.m. UTC
Initial device tree support for Qualcomm MSM8992 SoC and
LG Bullhead / Google Nexus 5X support.

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
---
 arch/arm64/Kconfig.platforms                       |  12 +
 arch/arm64/boot/dts/Makefile                       |   1 +
 arch/arm64/boot/dts/lge/Makefile                   |   5 +
 .../boot/dts/lge/msm8992-bullhead-rev-101.dts      |  41 +++
 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  38 +++
 arch/arm64/boot/dts/qcom/msm8992.dtsi              | 221 ++++++++++++
 arch/arm64/configs/bullhead_defconfig              | 377 +++++++++++++++++++++
 arch/arm64/configs/msm8992_defconfig               |   5 +
 8 files changed, 700 insertions(+)
 create mode 100644 arch/arm64/boot/dts/lge/Makefile
 create mode 100644 arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
 create mode 100644 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/msm8992.dtsi
 create mode 100644 arch/arm64/configs/bullhead_defconfig
 create mode 100644 arch/arm64/configs/msm8992_defconfig

Comments

Andy Gross July 8, 2016, 5:41 p.m. UTC | #1
On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
> Initial device tree support for Qualcomm MSM8992 SoC and
> LG Bullhead / Google Nexus 5X support.
> 
> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
> ---
>  arch/arm64/Kconfig.platforms                       |  12 +
>  arch/arm64/boot/dts/Makefile                       |   1 +
>  arch/arm64/boot/dts/lge/Makefile                   |   5 +
>  .../boot/dts/lge/msm8992-bullhead-rev-101.dts      |  41 +++
>  arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  38 +++
>  arch/arm64/boot/dts/qcom/msm8992.dtsi              | 221 ++++++++++++
>  arch/arm64/configs/bullhead_defconfig              | 377 +++++++++++++++++++++
>  arch/arm64/configs/msm8992_defconfig               |   5 +
>  8 files changed, 700 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/lge/Makefile
>  create mode 100644 arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
>  create mode 100644 arch/arm64/boot/dts/qcom/msm8992.dtsi
>  create mode 100644 arch/arm64/configs/bullhead_defconfig
>  create mode 100644 arch/arm64/configs/msm8992_defconfig
> 
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index 7ef1d05..515e669 100644
> --- a/arch/arm64/Kconfig.platforms
> +++ b/arch/arm64/Kconfig.platforms
> @@ -86,6 +86,18 @@ config ARCH_QCOM
>  	help
>  	  This enables support for the ARMv8 based Qualcomm chipsets.
>  
> +config ARCH_MSM8992
> +	bool "Qualcomm MSM8992"
> +	depends on ARCH_QCOM
> +	help
> +	  This enables support for the Qualcomm MSM8992 SoC.
> +
> +config MACH_LGE
> +	bool "LGE BullHead (MSM8992)"
> +	depends on ARCH_QCOM
> +	help
> +	  This enables support for the LGE Nexus 5X - BullHead MSM8992.

We don't add config options for End users.  Only for Soc Companies or people
actually producing the silicon.

> +
>  config ARCH_ROCKCHIP
>  	bool "Rockchip Platforms"
>  	select ARCH_HAS_RESET_CONTROLLER
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 6e199c9..bde90fb 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -13,6 +13,7 @@ dts-dirs += marvell
>  dts-dirs += mediatek
>  dts-dirs += nvidia
>  dts-dirs += qcom
> +dts-dirs += lge

No, please add the files to the qcom directory.

>  dts-dirs += renesas
>  dts-dirs += rockchip
>  dts-dirs += socionext
> diff --git a/arch/arm64/boot/dts/lge/Makefile b/arch/arm64/boot/dts/lge/Makefile
> new file mode 100644
> index 0000000..f4e7860
> --- /dev/null
> +++ b/arch/arm64/boot/dts/lge/Makefile
> @@ -0,0 +1,5 @@
> +dtb-$(CONFIG_MACH_LGE) += msm8992-bullhead-rev-101.dtb
> +
> +always          := $(dtb-y)
> +subdir-y        := $(dts-dirs)
> +clean-files     := *.dtb
> diff --git a/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
> new file mode 100644
> index 0000000..860cded
> --- /dev/null
> +++ b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
> @@ -0,0 +1,41 @@
> +/* Copyright (c) 2015, LGE Inc. All rights reserved.
> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +/dts-v1/;
> +
> +#include "../qcom/msm8992.dtsi"
> +
> +/ {
> +	model = "LGE MSM8992 BULLHEAD rev-1.01";
> +	compatible = "qcom,msm8992";
> +	qcom,board-id = <0xb64 0>;

Please work with sboyd to add the board-id to the dtbTool.  We don't put
board-ids in the dts file.  We post-process the dtb file and add them then.


> +};
> +
> +/ {
> +	aliases {
> +		serial0 = &blsp1_uart2;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0";
> +	};
> +
> +	soc {
> +		serial@f991e000 {
> +			status = "okay";
> +			pinctrl-names = "default", "sleep";
> +			pinctrl-0 = <&blsp1_uart2_default>;
> +			pinctrl-1 = <&blsp1_uart2_sleep>;
> +		};
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi

<snip>

> diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> new file mode 100644
> index 0000000..fa92a1a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
> @@ -0,0 +1,221 @@
> +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +/memreserve/ 0x00000000 0x00001000;

Please use reserved-memory{}.   And why are they setting aside 4k at the
beginning?  Trying to cover up corruption issues?

> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. MSM 8992";
> +	compatible = "qcom,msm8992";
> +	qcom,msm-id = <251 0>, <252 0>;
> +	qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;

See above comment on ids.

> +	interrupt-parent = <&intc>;
> +
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	chosen { };
> +

<snip>

> +#include "msm8992-pins.dtsi"
> diff --git a/arch/arm64/configs/bullhead_defconfig b/arch/arm64/configs/bullhead_defconfig

Please add whatever config options you have to the default defconfig.  we don't
define board specific configs for ARM64 platforms.  Or I should say, they won't
be accepted into the kernel.

Also, please separate defconfig changes into separate patches.

<snip>

> diff --git a/arch/arm64/configs/msm8992_defconfig b/arch/arm64/configs/msm8992_defconfig
> new file mode 100644
> index 0000000..f673a27
> --- /dev/null
> +++ b/arch/arm64/configs/msm8992_defconfig

See above comment.
> @@ -0,0 +1,5 @@
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_SCHED_HMP=y
> +CONFIG_NAMESPACES=y
> +# CONFIG_CORESIGHT is not set
> -- 
> 2.6.1
> 
> --
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Jeremy McNicoll Sept. 21, 2016, 12:42 a.m. UTC | #2
On 2016-07-08 10:41 AM, Andy Gross wrote:
> On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
>> Initial device tree support for Qualcomm MSM8992 SoC and
>> LG Bullhead / Google Nexus 5X support.
>>

Hopefully that was enough time for people to enjoy their summer 
vacations and welcome new additions to the family.


>> Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
>> ---
>>  arch/arm64/Kconfig.platforms                       |  12 +
>>  arch/arm64/boot/dts/Makefile                       |   1 +
>>  arch/arm64/boot/dts/lge/Makefile                   |   5 +
>>  .../boot/dts/lge/msm8992-bullhead-rev-101.dts      |  41 +++
>>  arch/arm64/boot/dts/qcom/msm8992-pins.dtsi         |  38 +++
>>  arch/arm64/boot/dts/qcom/msm8992.dtsi              | 221 ++++++++++++
>>  arch/arm64/configs/bullhead_defconfig              | 377 +++++++++++++++++++++
>>  arch/arm64/configs/msm8992_defconfig               |   5 +
>>  8 files changed, 700 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/lge/Makefile
>>  create mode 100644 arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>>  create mode 100644 arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
>>  create mode 100644 arch/arm64/boot/dts/qcom/msm8992.dtsi
>>  create mode 100644 arch/arm64/configs/bullhead_defconfig
>>  create mode 100644 arch/arm64/configs/msm8992_defconfig
>>
>> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
>> index 7ef1d05..515e669 100644
>> --- a/arch/arm64/Kconfig.platforms
>> +++ b/arch/arm64/Kconfig.platforms
>> @@ -86,6 +86,18 @@ config ARCH_QCOM
>>  	help
>>  	  This enables support for the ARMv8 based Qualcomm chipsets.
>>
>> +config ARCH_MSM8992
>> +	bool "Qualcomm MSM8992"
>> +	depends on ARCH_QCOM
>> +	help
>> +	  This enables support for the Qualcomm MSM8992 SoC.
>> +
>> +config MACH_LGE
>> +	bool "LGE BullHead (MSM8992)"
>> +	depends on ARCH_QCOM
>> +	help
>> +	  This enables support for the LGE Nexus 5X - BullHead MSM8992.
>
> We don't add config options for End users.  Only for Soc Companies or people
> actually producing the silicon.
>

removed.

>> +
>>  config ARCH_ROCKCHIP
>>  	bool "Rockchip Platforms"
>>  	select ARCH_HAS_RESET_CONTROLLER
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 6e199c9..bde90fb 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -13,6 +13,7 @@ dts-dirs += marvell
>>  dts-dirs += mediatek
>>  dts-dirs += nvidia
>>  dts-dirs += qcom
>> +dts-dirs += lge
>
> No, please add the files to the qcom directory.
>

ok, done

>>  dts-dirs += renesas
>>  dts-dirs += rockchip
>>  dts-dirs += socionext
>> diff --git a/arch/arm64/boot/dts/lge/Makefile b/arch/arm64/boot/dts/lge/Makefile
>> new file mode 100644
>> index 0000000..f4e7860
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/lge/Makefile
>> @@ -0,0 +1,5 @@
>> +dtb-$(CONFIG_MACH_LGE) += msm8992-bullhead-rev-101.dtb
>> +
>> +always          := $(dtb-y)
>> +subdir-y        := $(dts-dirs)
>> +clean-files     := *.dtb
>> diff --git a/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>> new file mode 100644
>> index 0000000..860cded
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
>> @@ -0,0 +1,41 @@
>> +/* Copyright (c) 2015, LGE Inc. All rights reserved.
>> + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "../qcom/msm8992.dtsi"
>> +
>> +/ {
>> +	model = "LGE MSM8992 BULLHEAD rev-1.01";
>> +	compatible = "qcom,msm8992";
>> +	qcom,board-id = <0xb64 0>;
>
> Please work with sboyd to add the board-id to the dtbTool.  We don't put
> board-ids in the dts file.  We post-process the dtb file and add them then.
>

sboyd has all the info he needs for this, I believe its just with legal 
now.  Will remove for V2.

It would be nice if we could get this dtbTool to automagically run as 
part of the build system.


>
>> +};
>> +
>> +/ {
>> +	aliases {
>> +		serial0 = &blsp1_uart2;
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = "serial0";
>> +	};
>> +
>> +	soc {
>> +		serial@f991e000 {
>> +			status = "okay";
>> +			pinctrl-names = "default", "sleep";
>> +			pinctrl-0 = <&blsp1_uart2_default>;
>> +			pinctrl-1 = <&blsp1_uart2_sleep>;
>> +		};
>> +	};
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
>
> <snip>
>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
>> new file mode 100644
>> index 0000000..fa92a1a
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
>> @@ -0,0 +1,221 @@
>> +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 and
>> + * only version 2 as published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +/memreserve/ 0x00000000 0x00001000;
>
> Please use reserved-memory{}.   And why are they setting aside 4k at the
> beginning?  Trying to cover up corruption issues?
>

I only have the existing kernel (3.10) and no insight as to why this is 
needed.  Something very interesting and/or unexpected was that I needed 
memreserve when using earlycon combined with

CONFIG_DEBUG_DRIVER && CONFIG_DEBUG_DEVRES

in order for the target / phone to boot.  It have very well booted its
just I cant tell given the serial debug is the way I currently have to
gain visibility into the status of the phone.

But when I turned off the a fore mentioned config options and continued 
to use earlycon it booted fine.

Removing memreserve.


>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
>> +
>> +/ {
>> +	model = "Qualcomm Technologies, Inc. MSM 8992";
>> +	compatible = "qcom,msm8992";
>> +	qcom,msm-id = <251 0>, <252 0>;

This is needed or else the LK provides the following error

[5380] qcom,msm-id entry not found

and refuses to boot.


>> +	qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
>
> See above comment on ids.

removal of this (pmic-id) seems to be ok.


>
>> +	interrupt-parent = <&intc>;
>> +
>> +	#address-cells = <2>;
>> +	#size-cells = <2>;
>> +
>> +	chosen { };
>> +
>
> <snip>
>
>> +#include "msm8992-pins.dtsi"
>> diff --git a/arch/arm64/configs/bullhead_defconfig b/arch/arm64/configs/bullhead_defconfig
>
> Please add whatever config options you have to the default defconfig.  we don't
> define board specific configs for ARM64 platforms.  Or I should say, they won't
> be accepted into the kernel.
>
> Also, please separate defconfig changes into separate patches.
>

Will keep the changes to the absolute minimum.

Looks like I am going to need these 3

+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=y
+CONFIG_BLK_DEV_RAM_SIZE=16384

as this unit doent have all the bits'N pieces working currently and is 
_ONLY_ able to boot a ramdisk.

-jeremy

> <snip>
>
>> diff --git a/arch/arm64/configs/msm8992_defconfig b/arch/arm64/configs/msm8992_defconfig
>> new file mode 100644
>> index 0000000..f673a27
>> --- /dev/null
>> +++ b/arch/arm64/configs/msm8992_defconfig
>
> See above comment.
>> @@ -0,0 +1,5 @@
>> +CONFIG_NO_HZ=y
>> +CONFIG_HIGH_RES_TIMERS=y
>> +CONFIG_SCHED_HMP=y
>> +CONFIG_NAMESPACES=y
>> +# CONFIG_CORESIGHT is not set
>> --
>> 2.6.1
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
>> the body of a message to majordomo@vger.kernel.org
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Stephen Boyd Sept. 22, 2016, 6:39 p.m. UTC | #3
Quoting Jeremy McNicoll (2016-09-20 17:42:02)
> On 2016-07-08 10:41 AM, Andy Gross wrote:
> > On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
> >> +
> >> +#include "../qcom/msm8992.dtsi"
> >> +
> >> +/ {
> >> +    model = "LGE MSM8992 BULLHEAD rev-1.01";
> >> +    compatible = "qcom,msm8992";
> >> +    qcom,board-id = <0xb64 0>;
> >
> > Please work with sboyd to add the board-id to the dtbTool.  We don't put
> > board-ids in the dts file.  We post-process the dtb file and add them then.
> >
> 
> sboyd has all the info he needs for this, I believe its just with legal 
> now.  Will remove for V2.

I've pushed out an update for dtbtool to have these msm ids.

> 
> >> +
> >> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
> >> +
> >> +/ {
> >> +    model = "Qualcomm Technologies, Inc. MSM 8992";
> >> +    compatible = "qcom,msm8992";
> >> +    qcom,msm-id = <251 0>, <252 0>;
> 
> This is needed or else the LK provides the following error
> 
> [5380] qcom,msm-id entry not found
> 
> and refuses to boot.
> 
> 
> >> +    qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
> >
> > See above comment on ids.
> 
> removal of this (pmic-id) seems to be ok.
> 

Having the msm ids (and the pmic ids) in dtbtool isn't going to help
here though. I believe the bootloader on these devices uses a design of
appended dtbs where each dtb has the qcom,{msm-id,board-id,pmic-id}
properties in them. The QCDT "header" that dtbtool generates is not
used.

To fix that problem we'll need to update dtbtool to inject these
properties into the dtbs based on the compatible strings. Or get
maintainers to accept that these ids are now necessary for proper
functionality.

Furthermore, the value of board-id (0xb64) is concerning. qcom only
supports a certain set of values there for their boards, but vendors are
free to do whatever they want with that value. This means they can reuse
existing values that would map to qcom's concept of the "mtp" or "cdp"
boards, or they can numbers that would alias with other vendors.
Thankfully, msm-id and pmic-id are values that are under qcom's control,
so those are always going to be unique and sane. Really all that could
alias is board-id.

What does this all mean? We can't support non-qcom boards in the same
boot.img because of the possibility for the board-id property to alias
between different dtbs. Or at least dtbtool will have to do some alias
analysis and eject one aliasing dtbs from the blob. It also means that
we have a lot of work to do in dtbtool to inject these properties based
on strings, and to have custom parsers for different vendor prefixes so
that we know what values to inject (the nightmare is growing).

I've asked the bootloader folks to fix this in future platforms so that
we match based on the compatible string, instead of having to do any
post processing. Basically, put dtbtool logic into the bootloader. The
discussion is still on-going, but I'm hopeful that we don't need to keep
doing things here with post-processing and the headache will be reduced.
That could totally backfire though if vendors decide to leave the
bootloader unchanged and boot the "qcom,msm8992-mtp" dtb that's been
slightly tweaked for their design. Let's hope that doesn't happen.
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Jeremy McNicoll Sept. 23, 2016, 11:27 p.m. UTC | #4
On 2016-09-22 11:39 AM, Stephen Boyd wrote:
> Quoting Jeremy McNicoll (2016-09-20 17:42:02)
>> On 2016-07-08 10:41 AM, Andy Gross wrote:
>>> On Thu, Jul 07, 2016 at 05:41:04PM -0700, Jeremy McNicoll wrote:
>>>> +
>>>> +#include "../qcom/msm8992.dtsi"
>>>> +
>>>> +/ {
>>>> +    model = "LGE MSM8992 BULLHEAD rev-1.01";
>>>> +    compatible = "qcom,msm8992";
>>>> +    qcom,board-id = <0xb64 0>;
>>>
>>> Please work with sboyd to add the board-id to the dtbTool.  We don't put
>>> board-ids in the dts file.  We post-process the dtb file and add them then.
>>>
>>
>> sboyd has all the info he needs for this, I believe its just with legal
>> now.  Will remove for V2.
>
> I've pushed out an update for dtbtool to have these msm ids.
>
>>
>>>> +
>>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>>> +#include <dt-bindings/clock/qcom,gcc-msm8994.h>
>>>> +
>>>> +/ {
>>>> +    model = "Qualcomm Technologies, Inc. MSM 8992";
>>>> +    compatible = "qcom,msm8992";
>>>> +    qcom,msm-id = <251 0>, <252 0>;
>>
>> This is needed or else the LK provides the following error
>>
>> [5380] qcom,msm-id entry not found
>>
>> and refuses to boot.
>>
>>
>>>> +    qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
>>>
>>> See above comment on ids.
>>
>> removal of this (pmic-id) seems to be ok.
>>
>
> Having the msm ids (and the pmic ids) in dtbtool isn't going to help
> here though. I believe the bootloader on these devices uses a design of
> appended dtbs where each dtb has the qcom,{msm-id,board-id,pmic-id}
> properties in them. The QCDT "header" that dtbtool generates is not
> used.
>
> To fix that problem we'll need to update dtbtool to inject these
> properties into the dtbs based on the compatible strings. Or get
> maintainers to accept that these ids are now necessary for proper
> functionality.


I will try modifying the tool to inject these values to understand
how easy and/or complicated it will be.  This topic will be raised
during plumbers as most people will be there.

>
> Furthermore, the value of board-id (0xb64) is concerning. qcom only
> supports a certain set of values there for their boards, but vendors are
> free to do whatever they want with that value. This means they can reuse
> existing values that would map to qcom's concept of the "mtp" or "cdp"
> boards, or they can numbers that would alias with other vendors.
> Thankfully, msm-id and pmic-id are values that are under qcom's control,
> so those are always going to be unique and sane. Really all that could
> alias is board-id.
>
> What does this all mean? We can't support non-qcom boards in the same
> boot.img because of the possibility for the board-id property to alias
> between different dtbs. Or at least dtbtool will have to do some alias
> analysis and eject one aliasing dtbs from the blob. It also means that
> we have a lot of work to do in dtbtool to inject these properties based
> on strings, and to have custom parsers for different vendor prefixes so
> that we know what values to inject (the nightmare is growing).
>

This provides a reasonably compelling argument that can be discussed 
with the device tree maintainers during Plumbers.

> I've asked the bootloader folks to fix this in future platforms so that
> we match based on the compatible string, instead of having to do any
> post processing. Basically, put dtbtool logic into the bootloader. The
> discussion is still on-going, but I'm hopeful that we don't need to keep
> doing things here with post-processing and the headache will be reduced.
> That could totally backfire though if vendors decide to leave the
> bootloader unchanged and boot the "qcom,msm8992-mtp" dtb that's been
> slightly tweaked for their design. Let's hope that doesn't happen.
>

Thank you for pushing this internally as it will definitely aid in the
mainline support going forward.

-jeremy
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diff mbox

Patch

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 7ef1d05..515e669 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -86,6 +86,18 @@  config ARCH_QCOM
 	help
 	  This enables support for the ARMv8 based Qualcomm chipsets.
 
+config ARCH_MSM8992
+	bool "Qualcomm MSM8992"
+	depends on ARCH_QCOM
+	help
+	  This enables support for the Qualcomm MSM8992 SoC.
+
+config MACH_LGE
+	bool "LGE BullHead (MSM8992)"
+	depends on ARCH_QCOM
+	help
+	  This enables support for the LGE Nexus 5X - BullHead MSM8992.
+
 config ARCH_ROCKCHIP
 	bool "Rockchip Platforms"
 	select ARCH_HAS_RESET_CONTROLLER
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 6e199c9..bde90fb 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -13,6 +13,7 @@  dts-dirs += marvell
 dts-dirs += mediatek
 dts-dirs += nvidia
 dts-dirs += qcom
+dts-dirs += lge
 dts-dirs += renesas
 dts-dirs += rockchip
 dts-dirs += socionext
diff --git a/arch/arm64/boot/dts/lge/Makefile b/arch/arm64/boot/dts/lge/Makefile
new file mode 100644
index 0000000..f4e7860
--- /dev/null
+++ b/arch/arm64/boot/dts/lge/Makefile
@@ -0,0 +1,5 @@ 
+dtb-$(CONFIG_MACH_LGE) += msm8992-bullhead-rev-101.dtb
+
+always          := $(dtb-y)
+subdir-y        := $(dts-dirs)
+clean-files     := *.dtb
diff --git a/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
new file mode 100644
index 0000000..860cded
--- /dev/null
+++ b/arch/arm64/boot/dts/lge/msm8992-bullhead-rev-101.dts
@@ -0,0 +1,41 @@ 
+/* Copyright (c) 2015, LGE Inc. All rights reserved.
+ * Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "../qcom/msm8992.dtsi"
+
+/ {
+	model = "LGE MSM8992 BULLHEAD rev-1.01";
+	compatible = "qcom,msm8992";
+	qcom,board-id = <0xb64 0>;
+};
+
+/ {
+	aliases {
+		serial0 = &blsp1_uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0";
+	};
+
+	soc {
+		serial@f991e000 {
+			status = "okay";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&blsp1_uart2_default>;
+			pinctrl-1 = <&blsp1_uart2_sleep>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
new file mode 100644
index 0000000..d2a26f0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8992-pins.dtsi
@@ -0,0 +1,38 @@ 
+/*
+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&msmgpio {
+	blsp1_uart2_default: blsp1_uart2_default {
+		pinmux {
+			function = "blsp_uart2";
+			pins = "gpio4", "gpio5";
+		};
+		pinconf {
+			pins = "gpio4", "gpio5";
+			drive-strength = <16>;
+			bias-disable;
+		};
+	};
+
+	blsp1_uart2_sleep: blsp1_uart2_sleep {
+		pinmux {
+			function = "gpio";
+			pins = "gpio4", "gpio5";
+		};
+		pinconf {
+			pins = "gpio4", "gpio5";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
new file mode 100644
index 0000000..fa92a1a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -0,0 +1,221 @@ 
+/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/memreserve/ 0x00000000 0x00001000;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,gcc-msm8994.h>
+
+/ {
+	model = "Qualcomm Technologies, Inc. MSM 8992";
+	compatible = "qcom,msm8992";
+	qcom,msm-id = <251 0>, <252 0>;
+	qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
+	interrupt-parent = <&intc>;
+
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&CPU0>;
+				};
+			};
+		};
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			next-level-cache = <&L2_0>;
+			// The currents(uA) correspond to the frequencies in the
+			// frequency table.
+			current = < 18250 //384000 kHZ
+				24330 //460800 kHZ
+				26920 //600000 kHZ
+				34600 //672000 kHz
+				38150 //787200 kHZ
+				46880 //864000 kHZ
+				55940 //960000 kHZ
+				81740 //1248000 kHZ
+				105870>; //1440000 kHZ
+			L2_0: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+			};
+		};
+	};
+
+	soc: soc { };
+
+	memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		device_type = "memory";
+		reg = <0 0 0 0>;
+
+		peripheral_mem: peripheral_region@0 {
+			linux,reserve-contiguous-region;
+			linux,reserve-region;
+			linux,remove-completely;
+			reg = <0 0x07400000 0 0x1c00000>;
+			label = "peripheral_mem";
+		};
+	};
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges = <0 0 0 0xffffffff>;
+	compatible = "simple-bus";
+
+	intc: interrupt-controller@f9000000 {
+		compatible = "qcom,msm-qgic2";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		reg = <0xf9000000 0x1000>,
+			<0xf9002000 0x1000>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <1 2 0xf08>,
+				<1 3 0xf08>,
+				<1 4 0xf08>,
+				<1 1 0xf08>;
+		clock-frequency = <19200000>;
+	};
+
+	timer@f9020000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "arm,armv7-timer-mem";
+		reg = <0xf9020000 0x1000>;
+		clock-frequency = <19200000>;
+
+		frame@f9021000 {
+			frame-number = <0>;
+			interrupts = <0 9 0x4>,
+					<0 8 0x4>;
+			reg = <0xf9021000 0x1000>,
+				<0xf9022000 0x1000>;
+		};
+
+		frame@f9023000 {
+			frame-number = <1>;
+			interrupts = <0 10 0x4>;
+			reg = <0xf9023000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@f9024000 {
+			frame-number = <2>;
+			interrupts = <0 11 0x4>;
+			reg = <0xf9024000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@f9025000 {
+			frame-number = <3>;
+			interrupts = <0 12 0x4>;
+			reg = <0xf9025000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@f9026000 {
+			frame-number = <4>;
+			interrupts = <0 13 0x4>;
+			reg = <0xf9026000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@f9027000 {
+			frame-number = <5>;
+			interrupts = <0 14 0x4>;
+			reg = <0xf9027000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@f9028000 {
+			frame-number = <6>;
+			interrupts = <0 15 0x4>;
+			reg = <0xf9028000 0x1000>;
+			status = "disabled";
+		};
+	};
+
+	restart@fc4ab000 {
+		compatible = "qcom,pshold";
+		reg = <0xfc4ab000 0x4>;
+	};
+
+	msmgpio: pinctrl@fd510000 {
+		compatible = "qcom,msm8994-pinctrl", "qcom,msm8974-pinctrl";
+		reg = <0xfd510000 0x4000>;
+		interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	blsp1_uart2: serial@f991e000 {
+		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+		reg = <0xf991e000 0x1000>;
+		interrupts = <0 108 0>;
+		status = "disabled";
+		clock-names = "core", "iface";
+		clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
+			<&clock_gcc GCC_BLSP1_AHB_CLK>;
+	};
+
+	clock_gcc: qcom,gcc@fc400000 {
+		compatible = "qcom,gcc-8994";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		#power-domain-cells = <1>;
+		reg = <0xfc400000 0x2000>;
+		clock-names = "xo", "xo_a_clk";
+	};
+
+	clock_rpm: qcom,rpmcc@fc401880 {
+		compatible = "qcom,rpmcc";
+		reg = <0xfc401880 0x4>;
+		reg-names = "cc_base";
+		#clock-cells = <1>;
+	};
+
+	clocks {
+		xo_board: xo_board {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <19200000>;
+		};
+
+		sleep_clk: sleep_clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+		};
+	};
+};
+
+#include "msm8992-pins.dtsi"
diff --git a/arch/arm64/configs/bullhead_defconfig b/arch/arm64/configs/bullhead_defconfig
new file mode 100644
index 0000000..5c082e6
--- /dev/null
+++ b/arch/arm64/configs/bullhead_defconfig
@@ -0,0 +1,377 @@ 
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_RCU_FAST_NO_HZ=y
+CONFIG_LOG_BUF_SHIFT=20
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_SCHED_HMP=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_PROFILING=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ARCH_MSM=y
+CONFIG_ARCH_MSM8994=y
+CONFIG_ARCH_MSM8994_V1_TLBI_WA=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_MSM8992=y
+CONFIG_MACH_LGE=y
+CONFIG_COMMON_CLK_QCOM=y
+CONFIG_MSM_GCC_8994=y
+# CONFIG_PCIE_QCOM is not set
+CONFIG_ARM64_A57_ERRATA_832075=y
+# CONFIG_SMP is not set
+CONFIG_SCHED_MC=y
+CONFIG_ARCH_WANTS_CTXSW_LOGGING=y
+CONFIG_NR_CPUS=1
+CONFIG_PREEMPT=y
+CONFIG_HZ_300=y
+CONFIG_ARMV7_COMPAT=y
+CONFIG_BALANCE_ANON_FILE_RECLAIM=y
+CONFIG_ZSMALLOC=y
+CONFIG_SECCOMP=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_COMPAT=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_LIMIT=0
+CONFIG_PM_RUNTIME=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+CONFIG_CPU_BOOST=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+# CONFIG_CPU_IDLE_GOV_MENU is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
+CONFIG_NETFILTER_XT_TARGET_TEE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_ESP=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_REJECT_SKERR=y
+CONFIG_NF_NAT_IPV4=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_TARGET_REJECT_SKERR=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_BRIDGE_NF_EBTABLES=y
+CONFIG_BRIDGE_EBT_BROUTE=y
+CONFIG_L2TP=y
+CONFIG_L2TP_DEBUGFS=y
+CONFIG_L2TP_V3=y
+CONFIG_L2TP_IP=y
+CONFIG_L2TP_ETH=y
+CONFIG_BRIDGE=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_PRIO=y
+CONFIG_NET_CLS_FW=y
+CONFIG_NET_CLS_U32=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_FLOW=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_RMNET_DATA=y
+CONFIG_RMNET_DATA_FC=y
+CONFIG_SOCKEV_NLMCAST=y
+CONFIG_BT=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_INTERNAL_REGDB=y
+CONFIG_RFKILL=y
+CONFIG_NFC=y
+CONFIG_NFC_PN548=y
+CONFIG_IPC_ROUTER=y
+CONFIG_IPC_ROUTER_SECURITY=y
+CONFIG_CMA=y
+CONFIG_ARM_CCI=y
+CONFIG_ZRAM=y
+CONFIG_ZRAM_LZ4_COMPRESS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_UID_STAT=y
+CONFIG_QSEECOM=y
+CONFIG_TI_DRV2667=y
+CONFIG_EARJACK_DEBUGGER=y
+CONFIG_UID_CPUTIME=y
+CONFIG_EEPROM_93CX6=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_REQ_CRYPT=y
+CONFIG_DM_VERITY=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_TUN=y
+CONFIG_RNDIS_IPA=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=y
+CONFIG_PPPOL2TP=y
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_USB_CATC=y
+CONFIG_USB_KAWETH=y
+CONFIG_USB_PEGASUS=y
+CONFIG_USB_RTL8150=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_CDC_EEM=y
+CONFIG_USB_NET_CDC_MBIM=y
+CONFIG_USB_NET_DM9601=y
+CONFIG_USB_NET_SMSC75XX=y
+CONFIG_USB_NET_SMSC95XX=y
+CONFIG_USB_NET_GL620A=y
+CONFIG_USB_NET_PLUSB=y
+CONFIG_USB_NET_MCS7830=y
+CONFIG_USB_NET_RNDIS_HOST=y
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_CX82310_ETH=y
+CONFIG_USB_NET_KALMIA=y
+CONFIG_USB_NET_QMI_WWAN=y
+CONFIG_USB_HSO=y
+CONFIG_USB_NET_INT51X1=y
+CONFIG_USB_IPHETH=y
+CONFIG_USB_SIERRA_NET=y
+CONFIG_USB_VL600=y
+CONFIG_CNSS=y
+CONFIG_BUS_AUTO_SUSPEND=y
+CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_CLD_LL_CORE=y
+CONFIG_ATH_CARDS=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_v21 is not set
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_GPIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_MSM_ADSPRPC=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_SPI_CONTEXTHUB=y
+CONFIG_SPI_QUP=y
+CONFIG_SPMI=y
+CONFIG_SPMI_MSM_PMIC_ARB=y
+CONFIG_PINCTRL=y
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_DEBUG_PINCTRL=y
+CONFIG_PINCTRL_MSM=y
+CONFIG_PINCTRL_MSM8X74=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_QPNP_PIN=y
+CONFIG_POWER_RESET_MSM=y
+CONFIG_MSM_DLOAD_MODE=y
+CONFIG_MSM_PM=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_PROXY_CONSUMER=y
+CONFIG_REGULATOR_MEM_ACC=y
+CONFIG_REGULATOR_TPS65132=y
+CONFIG_REGULATOR_STUB=y
+CONFIG_REGULATOR_RPM_SMD=y
+CONFIG_REGULATOR_QPNP=y
+CONFIG_REGULATOR_QPNP_LABIBB=y
+CONFIG_REGULATOR_SPM=y
+CONFIG_REGULATOR_CPR=y
+CONFIG_REGULATOR_DW8768=y
+# CONFIG_MEDIA_SUPPORT is not set
+# CONFIG_USB_GSPCA is not set
+# CONFIG_VGA_ARB is not set
+# CONFIG_SOUND is not set
+# CONFIG_SND_PCI is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_SOC is not set
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
+CONFIG_USB_PHY=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_DEBUG_FS=y
+# CONFIG_USB_DWC3_MSM is not set
+CONFIG_USB_G_ANDROID=y
+# CONFIG_MMC is not set
+CONFIG_RTC_CLASS=y
+# CONFIG_UIO=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_MSM_EVENT_TIMER=y
+CONFIG_MSM_COMMON_LOG=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_FS_ENCRYPTION=y
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SYSRQ_SCHED_DEBUG is not set
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_OOPS_LOG_BUFFER=y
+CONFIG_PANIC_ON_DATA_CORRUPTION=y
+CONFIG_ARM64_PTDUMP=y
+# CONFIG_EARLY_PRINTK is not set
+CONFIG_PID_IN_CONTEXTIDR=y
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_SELINUX is not set
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
diff --git a/arch/arm64/configs/msm8992_defconfig b/arch/arm64/configs/msm8992_defconfig
new file mode 100644
index 0000000..f673a27
--- /dev/null
+++ b/arch/arm64/configs/msm8992_defconfig
@@ -0,0 +1,5 @@ 
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SCHED_HMP=y
+CONFIG_NAMESPACES=y
+# CONFIG_CORESIGHT is not set