From patchwork Fri Aug 12 15:29:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 9277297 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 60A3860752 for ; Fri, 12 Aug 2016 15:29:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 531E628A52 for ; Fri, 12 Aug 2016 15:29:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 47F1728A56; Fri, 12 Aug 2016 15:29:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E307F28A59 for ; Fri, 12 Aug 2016 15:29:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752559AbcHLP3n (ORCPT ); Fri, 12 Aug 2016 11:29:43 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:33928 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752433AbcHLP3m (ORCPT ); Fri, 12 Aug 2016 11:29:42 -0400 Received: by mail-yw0-f194.google.com with SMTP id j12so1249037ywb.1 for ; Fri, 12 Aug 2016 08:29:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YYMe7KKlVuhNcuOdFB8YEznJAjPaQgYuU+rvmCqPl5g=; b=Ssurdp7XH5qrlPmaX00TO7MnxqwNUX0D4j84dG4R1ZvN3isHR9xcLd116lb2VrBAdi HN3FbuYYyWiR1wkIAEoi9IS5cwcIxp9jUw5uw0RjGWzDW9UZ3KiCiYKK6M/yJJ5TB69R Tu/zzhaLQPi/pajQozciKU4EwJd+Xdjoz/JECcEW9tDTCB5mE+YPAY8fYWeDAcxpeRQr r+9witTW1z45hP3xBrILmaU4HF7VqkP6ujTYcuV5nh/DLHWk58faxrXgh+9e7bG6uRV1 OQs/FsKnulwXcWCUv+eXxMq1WsHPnPRKfecGCSy4/BY5JcDRq+vf1+YZCfdG60wke7Za Rpwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YYMe7KKlVuhNcuOdFB8YEznJAjPaQgYuU+rvmCqPl5g=; b=PICycPPIcgy1VbkZHFYrK9mAppXvJ5sr2Upsvpx9MnYfr2DfkhCjc5yAggKawNAB7s YFYgWcQjVFT+zqITE/xYfcC+jCkxdrjP74zV+Pht5vZLUT7UPuCv1xYSAy0HlWPESetL XxHXTQ+ecgq7k1AjyVOqV+cMmeQJBqBQt4BRzDfhLpImBIX29838RxuUBA0BNnYcWPZE raikgv0xQ9YSp0qx3IOrCCGdLkrJXb+nZFPNop5Y8Bx4hc07uEgkyoUOz92qm6H+DD3e X3o8joZgCGk9yX/FXiBDzwAZ/7bqsjbWUiKEAsuZMjnqzz4q6oRoryddTukjJIcmlijP sWxg== X-Gm-Message-State: AEkoout+qGLKrvRh3HIyeFVZKSQpnYS9n+gNh5D32rG/ER1o/Oy3zauqjx+xtDrxgkm5Pg== X-Received: by 10.129.179.73 with SMTP id r70mr11600785ywh.142.1471015753393; Fri, 12 Aug 2016 08:29:13 -0700 (PDT) Received: from localhost ([2601:184:4002:8340:6af7:28ff:fe77:e429]) by smtp.gmail.com with ESMTPSA id i13sm3526348ywe.53.2016.08.12.08.29.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 Aug 2016 08:29:13 -0700 (PDT) From: Rob Clark To: iommu@lists.linux-foundation.org Cc: linux-arm-msm@vger.kernel.org, Sricharan , Rob Clark Subject: [PATCH 2/2] iommu/msm: wire up fault handling Date: Fri, 12 Aug 2016 11:29:07 -0400 Message-Id: <1471015747-569-2-git-send-email-robdclark@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1471015747-569-1-git-send-email-robdclark@gmail.com> References: <1471015747-569-1-git-send-email-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When things go wrong on the gpu, we can get *thousands* of faults. With so many pr_err() prints, which were slowing down resuming the iommu, drm/msm would think the GPU had actually hung and reset it. Wire up the fault reporting, so instead we get a small ratelimited print of the fault address from drm/msm's fault handler instead. Signed-off-by: Rob Clark --- drivers/iommu/msm_iommu.c | 16 +++++++++++----- drivers/iommu/msm_iommu.h | 3 +++ 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index f6f596f..1110b72 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -411,6 +411,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) } __disable_clocks(iommu); list_add(&iommu->dom_node, &priv->list_attached); + iommu->domain = domain; } } @@ -614,8 +615,8 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) goto fail; } - pr_err("Unexpected IOMMU page fault!\n"); - pr_err("base = %08x\n", (unsigned int)iommu->base); + pr_debug("Unexpected IOMMU page fault!\n"); + pr_debug("base = %08x\n", (unsigned int)iommu->base); ret = __enable_clocks(iommu); if (ret) @@ -624,9 +625,14 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) for (i = 0; i < iommu->ncb; i++) { fsr = GET_FSR(iommu->base, i); if (fsr) { - pr_err("Fault occurred in context %d.\n", i); - pr_err("Interesting registers:\n"); - print_ctx_regs(iommu->base, i); + int ret = report_iommu_fault(iommu->domain, + to_msm_priv(iommu->domain)->dev, + GET_FAR(iommu->base, i), 0); + if (ret == -ENOSYS) { + pr_err("Fault occurred in context %d.\n", i); + pr_err("Interesting registers:\n"); + print_ctx_regs(iommu->base, i); + } SET_FSR(iommu->base, i, 0x4000000F); SET_RESUME(iommu->base, i, 1); } diff --git a/drivers/iommu/msm_iommu.h b/drivers/iommu/msm_iommu.h index 4ca25d5..c53016c 100644 --- a/drivers/iommu/msm_iommu.h +++ b/drivers/iommu/msm_iommu.h @@ -56,6 +56,8 @@ * dom_node: list head for domain * ctx_list: list of 'struct msm_iommu_ctx_dev' * context_map: Bitmap to track allocated context banks + * domain: iommu domain that this iommu dev is a member of, + * ie. whose msm_priv::list_attached are we on? */ struct msm_iommu_dev { void __iomem *base; @@ -68,6 +70,7 @@ struct msm_iommu_dev { struct list_head dom_node; struct list_head ctx_list; DECLARE_BITMAP(context_map, IOMMU_MAX_CBS); + struct iommu_domain *domain; }; /**