From patchwork Thu Nov 24 10:00:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9445087 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 97395606DB for ; Thu, 24 Nov 2016 10:01:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7ADCF27A98 for ; Thu, 24 Nov 2016 10:01:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6FBAA27CF3; Thu, 24 Nov 2016 10:01:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 51B6D27CAF for ; Thu, 24 Nov 2016 10:01:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937312AbcKXKBQ (ORCPT ); Thu, 24 Nov 2016 05:01:16 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:45168 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937500AbcKXKBO (ORCPT ); Thu, 24 Nov 2016 05:01:14 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 556D7614A4; Thu, 24 Nov 2016 10:00:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479981652; bh=rQtXtSWJtpTXSSVMDyjuixr43+2EMZYiA5WrH19RJtI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c15rm2efjLtTYG4fAAmtg3kXwVA1sUZFfprGSPvjzENG9VFPSq7DPPnTNGKDbWvdL YX9TDbCNfvwBDnNfEwUFdxNYL1hZSUB1GFBA5Bnu03Fhi83d1WnfdAbmbK2MNt0B+g uI7Sr6kSKsEr4r9SLb7rVVe+z6EKkL3aNio+XJBE= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id EC8A861271; Thu, 24 Nov 2016 10:00:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479981651; bh=rQtXtSWJtpTXSSVMDyjuixr43+2EMZYiA5WrH19RJtI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oaiIASMOmfM+BsOc3UmX+kkc6TkOzsjUqUshfFi5yrOOiWJxPnQOD6cW9qGFF5ckQ vseWkfycmCuXak1uXlBugfU1fZjAeV5qyhyzGcKpncCdcMAIGN+tDkyENX9uJftkQt 3hOnaLkMGFwC4lz2p/27DzPsqqQZvf8NBJbvGMEw= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org EC8A861271 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [RESEND PATCH v4 1/7] remoteproc: qcom: Add and initialize private data for hexagon dsp. Date: Thu, 24 Nov 2016 15:30:32 +0530 Message-Id: <1479981638-32069-2-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1479981638-32069-1-git-send-email-akdwived@codeaurora.org> References: <1479981638-32069-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Resource string's specific to version of hexagon chip are initialized to be passed to probe for various resource init purpose. Also compatible string introduced are added to documentation. Signed-off-by: Avaneesh Kumar Dwivedi --- .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 2 + drivers/remoteproc/qcom_q6v5_pil.c | 61 +++++++++++++++++++++- 2 files changed, 62 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 57cb49e..d4c14f0 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -8,6 +8,8 @@ on the Qualcomm Hexagon core. Value type: Definition: must be one of: "qcom,q6v5-pil" + "qcom,q6v5-5-1-1-pil" + "qcom,q6v56-1-5-0-pil" - reg: Usage: required diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index 2e0caaa..3360312 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "remoteproc_internal.h" #include "qcom_mdt_loader.h" @@ -93,6 +94,22 @@ #define QDSS_BHS_ON BIT(21) #define QDSS_LDO_BYP BIT(22) +struct rproc_hexagon_res { + char *hexagon_mba_image; + char **proxy_reg_string; + char **active_reg_string; + int proxy_uV_uA[3][2]; + int active_uV_uA[1][2]; + char **proxy_clk_string; + char **active_clk_string; + int hexagon_ver; +}; + +struct reg_info { + struct regulator *reg; + int uV; + int uA; +}; struct q6v5 { struct device *dev; struct rproc *rproc; @@ -131,6 +148,12 @@ struct q6v5 { }; enum { + Q6V5_5_0_0, /*hexagon on msm8916*/ + Q6V5_5_1_1, /*hexagon on msm8974*/ + Q5V56_1_5_0, /*hexagon on msm8996*/ +}; + +enum { Q6V5_SUPPLY_CX, Q6V5_SUPPLY_MX, Q6V5_SUPPLY_MSS, @@ -890,8 +913,44 @@ static int q6v5_remove(struct platform_device *pdev) return 0; } +static const struct rproc_hexagon_res q6v56_1_5_0_res = { + .hexagon_mba_image = "mba.mbn", + .proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL}, + .active_reg_string = NULL, + .proxy_uV_uA = { {0, 0}, {0, 100000}, {0, 100000} }, + .active_uV_uA = { {0} }, + .proxy_clk_string = (char*[]){"xo", "pnoc", "qdss", NULL}, + .active_clk_string = (char*[]){"iface", "bus", "mem", + "gpll0_mss_clk", "snoc_axi_clk", "mnoc_axi_clk", NULL}, + .hexagon_ver = Q5V56_1_5_0, +}; + +static const struct rproc_hexagon_res q6v5_5_0_0_res = { + .hexagon_mba_image = "mba.mbn", + .proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL}, + .proxy_uV_uA = { {1050000, 0}, {0, 100000}, {0, 100000} }, + .active_reg_string = (char*[]){"mss", NULL}, + .active_uV_uA = { {1000000, 100000} }, + .proxy_clk_string = (char*[]){"xo", NULL}, + .active_clk_string = (char*[]){"iface", "bus", "mem", NULL}, + .hexagon_ver = Q6V5_5_0_0, +}; + +static const struct rproc_hexagon_res q6v5_5_1_1_res = { + .hexagon_mba_image = "mba.b00", + .proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL}, + .proxy_uV_uA = { {1050000, 0}, {0, 100000}, {0, 100000} }, + .active_reg_string = (char*[]){"mss", NULL}, + .active_uV_uA = { {1000000, 100000} }, + .proxy_clk_string = (char*[]){"xo", NULL}, + .active_clk_string = (char*[]){"iface", "bus", "mem", NULL}, + .hexagon_ver = Q6V5_5_1_1, +}; + static const struct of_device_id q6v5_of_match[] = { - { .compatible = "qcom,q6v5-pil", }, + { .compatible = "qcom,q6v5-pil", .data = &q6v5_5_0_0_res}, + { .compatible = "qcom,q6v5-5-1-1-pil", .data = &q6v5_5_1_1_res}, + { .compatible = "qcom,q6v56-1-5-0-pil", .data = &q6v56_1_5_0_res}, { }, };