From patchwork Thu Nov 24 10:00:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9445085 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E95C4606DB for ; Thu, 24 Nov 2016 10:01:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CC92D27A98 for ; Thu, 24 Nov 2016 10:01:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C132D27CF3; Thu, 24 Nov 2016 10:01:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 35EF727D0E for ; Thu, 24 Nov 2016 10:01:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937500AbcKXKBQ (ORCPT ); Thu, 24 Nov 2016 05:01:16 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:45236 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937770AbcKXKBO (ORCPT ); Thu, 24 Nov 2016 05:01:14 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2E95C61567; Thu, 24 Nov 2016 10:00:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479981655; bh=ODRqWp4IDiPgvi4UrEImKstbiVikvQXhyqtYmzq/uPQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bWmejVwhAADVLIhWM/TppahI74N2COmO0RACmbFy9cx7Fu2xc6zJD9sjTyD9ZKv2x zYW/j5B2zPmtzxD6B6LT1Cq85ZPtAcp9w3NESsx6Aqz09fXZCsr47AJ/laG9vKFDu1 NUw3andOMLgHrZjRjvGS/C78XZY3FzFtAMLf6FJU= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5509E61271; Thu, 24 Nov 2016 10:00:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1479981654; bh=ODRqWp4IDiPgvi4UrEImKstbiVikvQXhyqtYmzq/uPQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MZMaiQf0BrADGBENl2UEIsHlsotzfte0NpW1pwcobLQxES1ePXN3rpE7upKXLImAf A8GXDkhR0RMYHsbTlyJqxr7T9WbnrpL8f1HuCdk+Saz/M9fdePFsQLVf3dIGjBRS5R 9zvEQG4km+JzjaJ/xP69dpPKG/rJ2ANnrS3nQb98= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 5509E61271 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [RESEND PATCH v4 2/7] remoteproc: qcom: Initialize proxy and active clock's and regulator's Date: Thu, 24 Nov 2016 15:30:33 +0530 Message-Id: <1479981638-32069-3-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1479981638-32069-1-git-send-email-akdwived@codeaurora.org> References: <1479981638-32069-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Certain regulators and clocks need voting by rproc on behalf of hexagon only during restart operation but certain clocks and voltage need to be voted till hexagon is up, these regulators and clocks are identified as proxy and active resource whose handle is being obtained by supplying private proxy and active regulator and clock string. Signed-off-by: Avaneesh Kumar Dwivedi --- drivers/remoteproc/qcom_q6v5_pil.c | 148 +++++++++++++++++++++++++++---------- 1 file changed, 107 insertions(+), 41 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index 3360312..b0f0fcf 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -37,7 +37,6 @@ #include -#define MBA_FIRMWARE_NAME "mba.b00" #define MPSS_FIRMWARE_NAME "modem.mdt" #define MPSS_CRASH_REASON_SMEM 421 @@ -132,6 +131,14 @@ struct q6v5 { struct clk *ahb_clk; struct clk *axi_clk; struct clk *rom_clk; + struct clk *active_clks[8]; + struct clk *proxy_clks[4]; + struct reg_info active_regs[1]; + struct reg_info proxy_regs[3]; + int active_reg_count; + int proxy_reg_count; + int active_clk_count; + int proxy_clk_count; struct completion start_done; struct completion stop_done; @@ -160,27 +167,43 @@ enum { Q6V5_SUPPLY_PLL, }; -static int q6v5_regulator_init(struct q6v5 *qproc) +static int q6v5_regulator_init(struct device *dev, + struct reg_info *regs, char **reg_str, int volatage_load[][2]) { - int ret; + int reg_count = 0, i; - qproc->supply[Q6V5_SUPPLY_CX].supply = "cx"; - qproc->supply[Q6V5_SUPPLY_MX].supply = "mx"; - qproc->supply[Q6V5_SUPPLY_MSS].supply = "mss"; - qproc->supply[Q6V5_SUPPLY_PLL].supply = "pll"; + if (!reg_str) + return 0; - ret = devm_regulator_bulk_get(qproc->dev, - ARRAY_SIZE(qproc->supply), qproc->supply); - if (ret < 0) { - dev_err(qproc->dev, "failed to get supplies\n"); - return ret; - } + while (reg_str[reg_count] != NULL) + reg_count++; - regulator_set_load(qproc->supply[Q6V5_SUPPLY_CX].consumer, 100000); - regulator_set_load(qproc->supply[Q6V5_SUPPLY_MSS].consumer, 100000); - regulator_set_load(qproc->supply[Q6V5_SUPPLY_PLL].consumer, 10000); + if (!reg_count) + return reg_count; - return 0; + if (!regs) + return -ENOMEM; + + for (i = 0; i < reg_count; i++) { + const char *reg_name; + + reg_name = reg_str[i]; + regs[i].reg = devm_regulator_get(dev, reg_name); + if (IS_ERR(regs[i].reg)) { + + int rc = PTR_ERR(regs[i].reg); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s\n regulator", + reg_name); + return rc; + } + + regs[i].uV = volatage_load[i][0]; + regs[i].uA = volatage_load[i][1]; + } + + return reg_count; } static int q6v5_regulator_enable(struct q6v5 *qproc) @@ -725,27 +748,41 @@ static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev) return 0; } -static int q6v5_init_clocks(struct q6v5 *qproc) +static int q6v5_init_clocks(struct device *dev, struct clk **clks, + char **clk_str) { - qproc->ahb_clk = devm_clk_get(qproc->dev, "iface"); - if (IS_ERR(qproc->ahb_clk)) { - dev_err(qproc->dev, "failed to get iface clock\n"); - return PTR_ERR(qproc->ahb_clk); - } + int clk_count = 0, i; - qproc->axi_clk = devm_clk_get(qproc->dev, "bus"); - if (IS_ERR(qproc->axi_clk)) { - dev_err(qproc->dev, "failed to get bus clock\n"); - return PTR_ERR(qproc->axi_clk); - } + if (!clk_str) + return 0; + + while (clk_str[clk_count] != NULL) + clk_count++; + + if (!clk_count) + return clk_count; + + if (!clks) + return -ENOMEM; + + for (i = 0; i < clk_count; i++) { + const char *clock_name; + + clock_name = clk_str[i]; + clks[i] = devm_clk_get(dev, clock_name); + if (IS_ERR(clks[i])) { + + int rc = PTR_ERR(clks[i]); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s clock\n", + clock_name); + return rc; + } - qproc->rom_clk = devm_clk_get(qproc->dev, "mem"); - if (IS_ERR(qproc->rom_clk)) { - dev_err(qproc->dev, "failed to get mem clock\n"); - return PTR_ERR(qproc->rom_clk); } - return 0; + return clk_count; } static int q6v5_init_reset(struct q6v5 *qproc) @@ -830,10 +867,15 @@ static int q6v5_probe(struct platform_device *pdev) { struct q6v5 *qproc; struct rproc *rproc; - int ret; + const struct rproc_hexagon_res *desc; + int ret, count; + + desc = of_device_get_match_data(&pdev->dev); + if (!desc) + return -EINVAL; rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, - MBA_FIRMWARE_NAME, sizeof(*qproc)); + desc->hexagon_mba_image, sizeof(*qproc)); if (!rproc) { dev_err(&pdev->dev, "failed to allocate rproc\n"); return -ENOMEM; @@ -857,18 +899,42 @@ static int q6v5_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = q6v5_init_clocks(qproc); - if (ret) - goto free_rproc; + count = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, + desc->proxy_clk_string); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup proxy clocks.\n"); + return count; + } + qproc->proxy_clk_count = count; - ret = q6v5_regulator_init(qproc); - if (ret) - goto free_rproc; + count = q6v5_init_clocks(&pdev->dev, qproc->active_clks, + desc->active_clk_string); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup active clocks.\n"); + return count; + } + qproc->active_clk_count = count; ret = q6v5_init_reset(qproc); if (ret) goto free_rproc; + count = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, + desc->proxy_reg_string, (int (*)[2])desc->proxy_uV_uA); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup active regulators.\n"); + return count; + } + qproc->proxy_reg_count = count; + + count = q6v5_regulator_init(&pdev->dev, qproc->active_regs, + desc->active_reg_string, (int (*)[2])desc->active_uV_uA); + if (count < 0) { + dev_err(&pdev->dev, "Failed to setup proxy regulators.\n"); + return count; + } + qproc->active_reg_count = count; + ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt); if (ret < 0) goto free_rproc;