From patchwork Thu Dec 15 12:05:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9475949 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E9B31607EE for ; Thu, 15 Dec 2016 12:18:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E44FF2875E for ; Thu, 15 Dec 2016 12:18:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D948828761; Thu, 15 Dec 2016 12:18:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 838E12875E for ; Thu, 15 Dec 2016 12:18:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752273AbcLOMSt (ORCPT ); Thu, 15 Dec 2016 07:18:49 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:55550 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752138AbcLOMSr (ORCPT ); Thu, 15 Dec 2016 07:18:47 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 3A15161567; Thu, 15 Dec 2016 12:06:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1481803571; bh=UAUazb0gZ2ioc2zcUCBWb/nLTM8WjzJVbKsdz2wAWqg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NnElaJr1pzYJ8J5iLyug8FUZoF7hBXig6pq9mBh5UYdw7C+K9KxvZ2gj5twSaado6 36glwYPExyRWCP0NSQjSbnfr3mCKgKePB7EtuxkLGV9tDYjYLXphDx3vfaMp5KhxG6 gd9l4Vmi5lGUx3HIGlXpmo3bFha8GCjosknwqxMs= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8CFBE613E4; Thu, 15 Dec 2016 12:06:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1481803570; bh=UAUazb0gZ2ioc2zcUCBWb/nLTM8WjzJVbKsdz2wAWqg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mJTha2/oyZhhLLrHL+2VsUmKkX54uIjIEt1CPeJdcUi6pdp4ucgR+/Fy9wHKnLAnv PRqjUOtU4s3ge9H6ioBiKDStO/F/EatK0n/OKMd29ffs+swS3wKKtAn7JAtB/qGEml Ryb1xfkguFb03eBKIr9552a/OSzhq2zBPGFKAE0E= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 8CFBE613E4 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [PATCH v5 2/7] remoteproc: qcom: Add and initialize proxy and active clocks. Date: Thu, 15 Dec 2016 17:35:41 +0530 Message-Id: <1481803546-31592-3-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481803546-31592-1-git-send-email-akdwived@codeaurora.org> References: <1481803546-31592-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Certain regulators and clocks need voting by rproc on behalf of hexagon only during restart operation but certain clocks and voltage need to be voted till hexagon is up, these regulators and clocks are identified as proxy and active resource respectively, whose handle is being obtained by supplying proxy and active clock name string. Signed-off-by: Avaneesh Kumar Dwivedi --- drivers/remoteproc/qcom_q6v5_pil.c | 65 +++++++++++++++++++++++++++----------- 1 file changed, 47 insertions(+), 18 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index d875448..8c8b239 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -95,6 +95,8 @@ struct rproc_hexagon_res { const char *hexagon_mba_image; + char **proxy_clk_string; + char **active_clk_string; }; struct q6v5 { @@ -114,6 +116,11 @@ struct q6v5 { struct qcom_smem_state *state; unsigned stop_bit; + struct clk *active_clks[8]; + struct clk *proxy_clks[4]; + int active_clk_count; + int proxy_clk_count; + struct regulator_bulk_data supply[4]; struct clk *ahb_clk; @@ -706,27 +713,33 @@ static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev) return 0; } -static int q6v5_init_clocks(struct q6v5 *qproc) +static int q6v5_init_clocks(struct device *dev, struct clk **clks, + char **clk_str) { - qproc->ahb_clk = devm_clk_get(qproc->dev, "iface"); - if (IS_ERR(qproc->ahb_clk)) { - dev_err(qproc->dev, "failed to get iface clock\n"); - return PTR_ERR(qproc->ahb_clk); - } + int count = 0; + int i; - qproc->axi_clk = devm_clk_get(qproc->dev, "bus"); - if (IS_ERR(qproc->axi_clk)) { - dev_err(qproc->dev, "failed to get bus clock\n"); - return PTR_ERR(qproc->axi_clk); - } + if (!clk_str) + return 0; + + while (clk_str[count]) + count++; + + for (i = 0; i < count; i++) { + clks[i] = devm_clk_get(dev, clk_str[i]); + if (IS_ERR(clks[i])) { + + int rc = PTR_ERR(clks[i]); + + if (rc != -EPROBE_DEFER) + dev_err(dev, "Failed to get %s clock\n", + clk_str[i]); + return rc; + } - qproc->rom_clk = devm_clk_get(qproc->dev, "mem"); - if (IS_ERR(qproc->rom_clk)) { - dev_err(qproc->dev, "failed to get mem clock\n"); - return PTR_ERR(qproc->rom_clk); } - return 0; + return count; } static int q6v5_init_reset(struct q6v5 *qproc) @@ -843,9 +856,21 @@ static int q6v5_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = q6v5_init_clocks(qproc); - if (ret) + ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, + desc->proxy_clk_string); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to setup proxy clocks.\n"); + goto free_rproc; + } + qproc->proxy_clk_count = ret; + + ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, + desc->active_clk_string); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to setup active clocks.\n"); goto free_rproc; + } + qproc->active_clk_count = ret; ret = q6v5_regulator_init(qproc); if (ret) @@ -901,10 +926,14 @@ static int q6v5_remove(struct platform_device *pdev) static const struct rproc_hexagon_res msm8916_mss = { .hexagon_mba_image = "mba.mbn", + .proxy_clk_string = (char*[]){"xo", NULL}, + .active_clk_string = (char*[]){"iface", "bus", "mem", NULL}, }; static const struct rproc_hexagon_res msm8974_mss = { .hexagon_mba_image = "mba.b00", + .proxy_clk_string = (char*[]){"xo", NULL}, + .active_clk_string = (char*[]){"iface", "bus", "mem", NULL}, }; static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},