From patchwork Mon Jan 30 10:44:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9544789 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CC32B604DE for ; Mon, 30 Jan 2017 10:51:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD48326224 for ; Mon, 30 Jan 2017 10:51:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A1CB31FF60; Mon, 30 Jan 2017 10:51:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 015501FF60 for ; Mon, 30 Jan 2017 10:51:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752684AbdA3KvQ (ORCPT ); Mon, 30 Jan 2017 05:51:16 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:51762 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751380AbdA3Kug (ORCPT ); Mon, 30 Jan 2017 05:50:36 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4C5E46081B; Mon, 30 Jan 2017 10:44:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1485773059; bh=ImWPmmqsK01HbVBc3oLj3RMUvenNzBw9eGhH49Ai/e4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A/YZhBbAGyFipO4yCxo8lEqsdF7jgGiRzBzKsFDFnFUHukT/OUihYxa9sVFzPzycw iGumzmELBJUs+gdd5E0rou4YyjVctnwE3moPcXtjvlYIqOnIBJtnAAwvyiiO0lmDnG dCvNOaFLqSKBlHE1E0Vk4W+YRCoHR+GCJE1DreXA= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 24EB66041C; Mon, 30 Jan 2017 10:44:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1485773058; bh=ImWPmmqsK01HbVBc3oLj3RMUvenNzBw9eGhH49Ai/e4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RW132wWX/1+z7sLWdWjUKYejaLu7FNWHNZAZ2nqlpj2UBAzAhP76EZxoKv01ObwQp XFX32K39cVIBCs8QSHJLHUMDRFX0kpz405WBwktYMtfodVaX4gzCVxp5Lo9ziBySxK EEchyI4xezyTQ/Yzoq3ItPHY5UsFvf5eKt7dXL0g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 24EB66041C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org, Avaneesh Kumar Dwivedi Subject: [PATCH v2 1/3] soc: qcom: Add scm call to protect modem mem in qcom scm driver. Date: Mon, 30 Jan 2017 16:14:02 +0530 Message-Id: <1485773044-31489-2-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485773044-31489-1-git-send-email-akdwived@codeaurora.org> References: <1485773044-31489-1-git-send-email-akdwived@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch add scm call support to make hypervisor call for protecting memory region on armv8 arch cpu's. This is required to bring up modem on msm8996. MSS rproc driver will make hypervisor call for protecting and granting permission of DDR region where MBA, MDT, FW are loaded. Signed-off-by: Avaneesh Kumar Dwivedi --- drivers/firmware/qcom_scm-64.c | 17 +++++++++++++++++ drivers/firmware/qcom_scm.c | 14 ++++++++++++++ drivers/firmware/qcom_scm.h | 3 +++ include/linux/qcom_scm.h | 1 + 4 files changed, 35 insertions(+) diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 4a0f5ea..5f00a64 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -358,3 +358,20 @@ int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) return ret ? : res.a1; } + +int __qcom_scm_assign_mem(struct device *dev, void *data) +{ + int ret; + struct qcom_scm_desc *desc = data; + struct arm_smccc_res res; + + desc->arginfo = QCOM_SCM_ARGS(7, QCOM_SCM_RO, QCOM_SCM_VAL, + QCOM_SCM_RO, QCOM_SCM_VAL, QCOM_SCM_RO, + QCOM_SCM_VAL, QCOM_SCM_VAL); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_MP, + QCOM_MEM_PROT_ASSIGN_ID, + desc, &res); + + return ret ? : res.a1; +} diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 893f953ea..f476803 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -292,6 +292,20 @@ int qcom_scm_pas_shutdown(u32 peripheral) } EXPORT_SYMBOL(qcom_scm_pas_shutdown); +/** + * qcom_scm_assign_mem() - Apply new access permission of DDR + * region passed via descriptor and does second stage + * translation of intermediate physical address. + * @desc: descriptor to send to hypervisor + * + * Return 0 on success. + */ +int qcom_scm_assign_mem(void *desc) +{ + return __qcom_scm_assign_mem(__scm->dev, desc); +} +EXPORT_SYMBOL(qcom_scm_assign_mem); + static int qcom_scm_pas_reset_assert(struct reset_controller_dev *rcdev, unsigned long idx) { diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 3584b00..d88fd4b 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -47,6 +47,8 @@ extern int __qcom_scm_hdcp_req(struct device *dev, #define QCOM_SCM_PAS_SHUTDOWN_CMD 0x6 #define QCOM_SCM_PAS_IS_SUPPORTED_CMD 0x7 #define QCOM_SCM_PAS_MSS_RESET 0xa +#define QCOM_SCM_SVC_MP 0xc +#define QCOM_MEM_PROT_ASSIGN_ID 0x16 extern bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral); extern int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral, dma_addr_t metadata_phys); @@ -55,6 +57,7 @@ extern int __qcom_scm_pas_mem_setup(struct device *dev, u32 peripheral, extern int __qcom_scm_pas_auth_and_reset(struct device *dev, u32 peripheral); extern int __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral); extern int __qcom_scm_pas_mss_reset(struct device *dev, bool reset); +extern int __qcom_scm_assign_mem(struct device *dev, void *desc); /* common error codes */ #define QCOM_SCM_V2_EBUSY -12 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index cc32ab8..f9ecf35 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -36,6 +36,7 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size); extern int qcom_scm_pas_auth_and_reset(u32 peripheral); extern int qcom_scm_pas_shutdown(u32 peripheral); +extern int qcom_scm_assign_mem(void *desc); #define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1