From patchwork Tue Mar 7 17:14:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 9609687 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0675F6046A for ; Tue, 7 Mar 2017 19:13:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 18D7328509 for ; Tue, 7 Mar 2017 19:13:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0DEC62851A; Tue, 7 Mar 2017 19:13:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71F0228509 for ; Tue, 7 Mar 2017 19:13:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755842AbdCGTM4 (ORCPT ); Tue, 7 Mar 2017 14:12:56 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:33396 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755840AbdCGTJz (ORCPT ); Tue, 7 Mar 2017 14:09:55 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 35523607BE; Tue, 7 Mar 2017 17:14:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1488906869; bh=OvDEnr+fsZOPLtEeDLAnhyCdsd9a8bwADXlSBwyIj2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cAL8rqBcPtuCa5/TeM8IUdb984MoJmu1I7DLwOLzhKM8rMMILvfpAcXfg3LVRdbvj nGRDwtQyuQTjBhFIZI7APuekJBrfPY/LpWV14dyxl5Oll8mZgJleHPikBnFHxC0bFi UgtbWCW0PlUhCxtWb/jNtGmN1aoviSTFx0E3mdxg= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6B009607A1; Tue, 7 Mar 2017 17:14:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1488906868; bh=OvDEnr+fsZOPLtEeDLAnhyCdsd9a8bwADXlSBwyIj2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=agQA7AG7yH13V8p7gvo5iBaabbai0lofY5jZqTa/xx5p9D5ORg4iHDOBG72K+2HD5 NMSCade7huHBm7oS5uzP1uAAOQzuJBS4JwTqSv+nDs/SAEa0bMSs/9iI5QLoeWe59A kb7A9nPNHsffpAg2kph+fbsfKJwXols1dcPaNV1o= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6B009607A1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 3/6] drm/msm: Make separate iommu function tables for v1 and v2 MMUs Date: Tue, 7 Mar 2017 10:14:17 -0700 Message-Id: <1488906860-11073-4-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1488906860-11073-1-git-send-email-jcrouse@codeaurora.org> References: <1488906860-11073-1-git-send-email-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we have the infrastructure for IOMMU function tables it makes sense to use it to differentiate between v1 and v2 targets. It adds a bit more infrastructure but it also gives us the freedom to expand on each flavor (especially v2) for things like dynamic domains. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/msm_iommu.c | 60 ++++++++++++++++++++++++++++------------- 1 file changed, 41 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c index d520db2..c1bfc92 100644 --- a/drivers/gpu/drm/msm/msm_iommu.c +++ b/drivers/gpu/drm/msm/msm_iommu.c @@ -21,7 +21,6 @@ struct msm_iommu { struct msm_mmu base; struct iommu_domain *domain; - bool has_ctx; }; #define to_msm_iommu(x) container_of(x, struct msm_iommu, base) @@ -40,15 +39,12 @@ static int msm_fault_handler(struct iommu_domain *domain, struct device *dev, return 0; } -static int msm_iommu_attach(struct msm_mmu *mmu, const char * const *names, - int cnt) +static int msm_iommu_v1_attach(struct msm_mmu *mmu, const char *const *names, + int cnt) { struct msm_iommu *iommu = to_msm_iommu(mmu); int i, ret; - if (!iommu->has_ctx) - return iommu_attach_device(iommu->domain, mmu->dev); - for (i = 0; i < cnt; i++) { struct device *ctx = msm_iommu_get_ctx(names[i]); @@ -67,15 +63,12 @@ static int msm_iommu_attach(struct msm_mmu *mmu, const char * const *names, return 0; } -static void msm_iommu_detach(struct msm_mmu *mmu, const char * const *names, - int cnt) +static void msm_iommu_v1_detach(struct msm_mmu *mmu, const char * const *names, + int cnt) { struct msm_iommu *iommu = to_msm_iommu(mmu); int i; - if (!iommu->has_ctx) - iommu_detach_device(iommu->domain, mmu->dev); - for (i = 0; i < cnt; i++) { struct device *ctx = msm_iommu_get_ctx(names[i]); @@ -86,6 +79,22 @@ static void msm_iommu_detach(struct msm_mmu *mmu, const char * const *names, } } +static int msm_iommu_v2_attach(struct msm_mmu *mmu, const char * const *names, + int cnt) +{ + struct msm_iommu *iommu = to_msm_iommu(mmu); + + return iommu_attach_device(iommu->domain, mmu->dev); +} + +static void msm_iommu_v2_detach(struct msm_mmu *mmu, const char * const *names, + int cnt) +{ + struct msm_iommu *iommu = to_msm_iommu(mmu); + + iommu_detach_device(iommu->domain, mmu->dev); +} + static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova, struct sg_table *sgt, unsigned len, int prot) { @@ -159,9 +168,19 @@ static void msm_iommu_destroy(struct msm_mmu *mmu) kfree(iommu); } -static const struct msm_mmu_funcs funcs = { - .attach = msm_iommu_attach, - .detach = msm_iommu_detach, +/* These are for qcom,msm-smmu-v2 and qcom,msm-mmu-500 based targets */ +static const struct msm_mmu_funcs funcs_v1 = { + .attach = msm_iommu_v1_attach, + .detach = msm_iommu_v1_detach, + .map = msm_iommu_map, + .unmap = msm_iommu_unmap, + .destroy = msm_iommu_destroy, +}; + +/* These are for the arm-smmu based targets */ +static const struct msm_mmu_funcs funcs_v2 = { + .attach = msm_iommu_v2_attach, + .detach = msm_iommu_v2_detach, .map = msm_iommu_map, .unmap = msm_iommu_unmap, .destroy = msm_iommu_destroy, @@ -170,18 +189,21 @@ static void msm_iommu_destroy(struct msm_mmu *mmu) struct msm_mmu *msm_iommu_new(struct device *dev, struct iommu_domain *domain) { struct msm_iommu *iommu; + const struct msm_mmu_funcs *funcs; iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); if (!iommu) return ERR_PTR(-ENOMEM); - iommu->domain = domain; - msm_mmu_init(&iommu->base, dev, &funcs); - iommu_set_fault_handler(domain, msm_fault_handler, iommu, true); - if (of_find_compatible_node(NULL, NULL, "qcom,msm-smmu-v2") || of_find_compatible_node(NULL, NULL, "qcom,msm-mmu-500")) - iommu->has_ctx = true; + funcs = &funcs_v1; + else + funcs = &funcs_v2; + + iommu->domain = domain; + msm_mmu_init(&iommu->base, dev, funcs); + iommu_set_fault_handler(domain, msm_fault_handler, iommu, true); return &iommu->base; }