From patchwork Thu Jul 13 21:52:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 9839605 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 443F060392 for ; Thu, 13 Jul 2017 21:52:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71B7D28794 for ; Thu, 13 Jul 2017 21:52:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 664AC28797; Thu, 13 Jul 2017 21:52:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA31C28794 for ; Thu, 13 Jul 2017 21:52:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751375AbdGMVwu (ORCPT ); Thu, 13 Jul 2017 17:52:50 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:55638 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752731AbdGMVwt (ORCPT ); Thu, 13 Jul 2017 17:52:49 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id C941A612BB; Thu, 13 Jul 2017 21:52:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1499982768; bh=qWojsvOZGV/A1dEGfamhfMFN1OZP7pieTTZsPSi0PCg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DzOs2RReM4FT/NNu69H9OuiWaYFi3Lt5GIzLfmw7n+k6HlCMcOEFAyy2PbXOADvrW 4iHxvncqLh/yD7Lcd9PZwwsRpAEo5RKMbhknpDE7uhI+ZqL2VM4vOXlBT7z4zd015P i/09iDqwbkSBYVK45xD2jN+b/NsY+TSZsQYta9FA= Received: from timur-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: timur@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 561CC61246; Thu, 13 Jul 2017 21:52:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1499982768; bh=qWojsvOZGV/A1dEGfamhfMFN1OZP7pieTTZsPSi0PCg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DzOs2RReM4FT/NNu69H9OuiWaYFi3Lt5GIzLfmw7n+k6HlCMcOEFAyy2PbXOADvrW 4iHxvncqLh/yD7Lcd9PZwwsRpAEo5RKMbhknpDE7uhI+ZqL2VM4vOXlBT7z4zd015P i/09iDqwbkSBYVK45xD2jN+b/NsY+TSZsQYta9FA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 561CC61246 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=timur@codeaurora.org From: Timur Tabi To: andy.gross@linaro.org, david.brown@linaro.org, Linus Walleij , Bjorn Andersson , linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: timur@codeaurora.org Subject: [PATCH 1/2] pinctrl: qcom: disable GPIO groups with no pins Date: Thu, 13 Jul 2017 16:52:42 -0500 Message-Id: <1499982763-29619-2-git-send-email-timur@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499982763-29619-1-git-send-email-timur@codeaurora.org> References: <1499982763-29619-1-git-send-email-timur@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To support sparse GPIO maps, pinctrl-msm client drivers can specify that a given GPIO has a pin count of zero. These GPIOs will be considered "hidden". Any attempt to claim the GPIO will fail, and they will not be listed in debugfs. However, when the driver probes, it calls gpiochip_add_data() which wants to initialize the direction of all the GPIOs, even the ones that are unavailable. Therefore, msm_gpio_get_direction() checks to make sure the pin is available. Signed-off-by: Timur Tabi Acked-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-msm.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 273badd..e915db4 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -165,7 +165,22 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, return 0; } +/* + * Request a GPIO. If the number of pins for this GPIO group is zero, + * then assume that the GPIO is unavailable. + */ +static int msm_request(struct pinctrl_dev *pctldev, unsigned int offset) +{ + struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + const struct msm_pingroup *g; + + g = &pctrl->soc->groups[offset]; + + return g->npins ? 0 : -ENODEV; +} + static const struct pinmux_ops msm_pinmux_ops = { + .request = msm_request, .get_functions_count = msm_get_functions_count, .get_function_name = msm_get_function_name, .get_function_groups = msm_get_function_groups, @@ -430,6 +445,14 @@ static int msm_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) g = &pctrl->soc->groups[offset]; + /* + * If the GPIO is unavailable, just return error. This is necessary + * because the GPIO layer tries to initialize the direction of all + * the GPIOs, even the ones that are unavailable. + */ + if (!g->npins) + return -ENODEV; + val = readl(pctrl->regs + g->ctl_reg); /* 0 = output, 1 = input */ @@ -494,6 +517,11 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, }; g = &pctrl->soc->groups[offset]; + + /* If the GPIO group has no pins, then don't show it. */ + if (!g->npins) + return; + ctl_reg = readl(pctrl->regs + g->ctl_reg); is_out = !!(ctl_reg & BIT(g->oe_bit)); @@ -503,7 +531,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s, seq_printf(s, " %-8s: %-3s %d", g->name, is_out ? "out" : "in", func); seq_printf(s, " %dmA", msm_regval_to_drive(drive)); - seq_printf(s, " %s", pulls[pull]); + seq_printf(s, " %s\n", pulls[pull]); } static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) @@ -511,10 +539,8 @@ static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) unsigned gpio = chip->base; unsigned i; - for (i = 0; i < chip->ngpio; i++, gpio++) { + for (i = 0; i < chip->ngpio; i++, gpio++) msm_gpio_dbg_show_one(s, NULL, chip, i, gpio); - seq_puts(s, "\n"); - } } #else