From patchwork Fri Jul 21 11:01:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manu Gautam X-Patchwork-Id: 9856571 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 23457601C0 for ; Fri, 21 Jul 2017 11:03:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0EB9C286D4 for ; Fri, 21 Jul 2017 11:03:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 03B42287A1; Fri, 21 Jul 2017 11:03:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 925DE286D4 for ; Fri, 21 Jul 2017 11:03:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752811AbdGULCo (ORCPT ); Fri, 21 Jul 2017 07:02:44 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58294 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752275AbdGULCm (ORCPT ); Fri, 21 Jul 2017 07:02:42 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5FB1B6071D; Fri, 21 Jul 2017 11:02:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500634961; bh=RJJRvHix4rrDGaX+utmP4qlZLeroVPCbOfE4JwggPb0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LjUHLkR7yZI8D1Qm/IbktuuJS5HJHp7xZqEnTyxzivabg0wcP2/+hXjy4H0fWJKTR TY1cGMOC+mnSWOIWLdBwS3kJ0cq0KAdnSpjPWAv4zYnJqW7OKkGsDI069h0KMDY1sm fmOYAr9/rgFA6db0OhGWCURPIhFVU3zw/hoAMAiQ= Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7435761161; Fri, 21 Jul 2017 11:02:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1500634960; bh=RJJRvHix4rrDGaX+utmP4qlZLeroVPCbOfE4JwggPb0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EqU8h2wrvfllEmk/+kb7xz8v91UhUO3fbnqjte0Xs6tEi3vlvEm9ys40Mfl2CZ1nB XbSgTnTfFVk6bQ4TJ/9/tbu97Ixirirf16dwQNwBDOJt4yXdX7YsrH85gKfqvHahLk TKRvYKSFKlNOwNZ1Sr+RtrsUVTAu/qPPylH4YzAc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7435761161 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I , Felipe Balbi Cc: linux-arm-msm@vger.kernel.org, Manu Gautam , Vivek Gautam , Heiko Stuebner , Yoshihiro Shimoda , linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v1 3/6] phy: qcom-qusb2: Power-on PHY before initialization Date: Fri, 21 Jul 2017 16:31:58 +0530 Message-Id: <1500634921-25914-4-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500634921-25914-1-git-send-email-mgautam@codeaurora.org> References: <1500634921-25914-1-git-send-email-mgautam@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PHY must be powered on before turning ON clocks and attempting to initialize it. Driver is exposing separate init and power_on routines for this. Apparently USB dwc3 core driver performs power-on after init. Also, poweron and init for QUSB2 PHY need to be executed together always, hence remove poweron callback from phy_ops and explicitly perform this from init, similar changes needed for poweroff. Signed-off-by: Manu Gautam diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index 6c57524..fa60a99 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -195,13 +195,13 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4); } -static int qusb2_phy_poweron(struct phy *phy) +static int qusb2_phy_poweron(struct qusb2_phy *qphy) { - struct qusb2_phy *qphy = phy_get_drvdata(phy); + struct device *dev = &qphy->phy->dev; int num = ARRAY_SIZE(qphy->vregs); int ret; - dev_vdbg(&phy->dev, "%s(): Powering-on QUSB2 phy\n", __func__); + dev_vdbg(dev, "%s(): Powering-on QUSB2 phy\n", __func__); /* turn on regulator supplies */ ret = regulator_bulk_enable(num, qphy->vregs); @@ -210,7 +210,7 @@ static int qusb2_phy_poweron(struct phy *phy) ret = clk_prepare_enable(qphy->iface_clk); if (ret) { - dev_err(&phy->dev, "failed to enable iface_clk, %d\n", ret); + dev_err(dev, "failed to enable iface_clk, %d\n", ret); regulator_bulk_disable(num, qphy->vregs); return ret; } @@ -218,10 +218,8 @@ static int qusb2_phy_poweron(struct phy *phy) return 0; } -static int qusb2_phy_poweroff(struct phy *phy) +static int qusb2_phy_poweroff(struct qusb2_phy *qphy) { - struct qusb2_phy *qphy = phy_get_drvdata(phy); - clk_disable_unprepare(qphy->iface_clk); regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); @@ -238,11 +236,15 @@ static int qusb2_phy_init(struct phy *phy) dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__); + ret = qusb2_phy_poweron(qphy); + if (ret) + return ret; + /* enable ahb interface clock to program phy */ ret = clk_prepare_enable(qphy->cfg_ahb_clk); if (ret) { dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); - return ret; + goto poweroff_phy; } /* Perform phy reset */ @@ -344,6 +346,9 @@ static int qusb2_phy_init(struct phy *phy) reset_control_assert(qphy->phy_reset); disable_ahb_clk: clk_disable_unprepare(qphy->cfg_ahb_clk); +poweroff_phy: + qusb2_phy_poweroff(qphy); + return ret; } @@ -362,14 +367,14 @@ static int qusb2_phy_exit(struct phy *phy) clk_disable_unprepare(qphy->cfg_ahb_clk); + qusb2_phy_poweroff(qphy); + return 0; } static const struct phy_ops qusb2_phy_gen_ops = { .init = qusb2_phy_init, .exit = qusb2_phy_exit, - .power_on = qusb2_phy_poweron, - .power_off = qusb2_phy_poweroff, .owner = THIS_MODULE, };