From patchwork Wed Sep 27 08:59:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manu Gautam X-Patchwork-Id: 9973495 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 040F160365 for ; Wed, 27 Sep 2017 09:02:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A09371FF0B for ; Wed, 27 Sep 2017 09:02:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9524222BF1; Wed, 27 Sep 2017 09:02:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 115151FF0B for ; Wed, 27 Sep 2017 09:02:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752868AbdI0JBo (ORCPT ); Wed, 27 Sep 2017 05:01:44 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51750 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752845AbdI0JBk (ORCPT ); Wed, 27 Sep 2017 05:01:40 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0923860C55; Wed, 27 Sep 2017 09:01:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1506502900; bh=iYyT8csHGteGxWjtu9ABn4e7VgKOjBW8Z6Am7y0XjjU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YBQRDf90ou7QBVKPBNiVgNKKNdzwJvbzpN1XlbFENAxV6/OMjFE10cRFhoX/hDBYe BTKrdFImJ7y08C4OP1SV5Oh5CmB6pY8jWt6a563faeH5fPdYyOkBlIdk8JjUhkztHR cvq93HV6pxpOHCUMdU4T63GjQa1Z9YfvHyITtZQw= Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4577F609F2; Wed, 27 Sep 2017 09:01:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1506502897; bh=iYyT8csHGteGxWjtu9ABn4e7VgKOjBW8Z6Am7y0XjjU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Uhz0JZIj3wbstGi7fupgF5X+pWOMONxgrXJX0Z4Ti7c3yuhkGLMbtSD8ziSif15ZN p7gxQiAZ6jTnadFetzrTc6OFNEBA9FWHIibaiEUDI0WZ43sqn0GrbANwhHu4TcKMBS DhGW5e3uGBWn5/UBTK9sXhdpzFmikL8O2fEvbWHE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4577F609F2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I Cc: Felipe Balbi , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam , Vivek Gautam , Varadarajan Narayanan , Jaehoon Chung , Fengguang Wu , Wei Yongjun , linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v2 16/17] phy: qcom-qmp: Override lane0_power_present signal in device mode Date: Wed, 27 Sep 2017 14:29:12 +0530 Message-Id: <1506502753-27408-17-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506502753-27408-1-git-send-email-mgautam@codeaurora.org> References: <1506502753-27408-1-git-send-email-mgautam@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP lane0_power_present signal must be asserted of hardware to operate properly in SS device mode. On some platforms where VBUS line is not connected to SS QMP PHY there is SS_PHY_CTRL register in QSCRATCH wrapper that can be used by software to override VBUS. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index d4e1436..1403de3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -61,6 +61,9 @@ #define USB3_MODE BIT(0) /* enables USB3 mode */ #define DP_MODE BIT(1) /* enables DP mode */ +/* QSCRATCH register bits */ +#define QSCRATCH_SS_PHY_CTRL 0x30 +#define LANE0_PWR_PRESENT BIT(24) #define PHY_INIT_COMPLETE_TIMEOUT 1000 #define POWER_DOWN_DELAY_US_MIN 10 @@ -558,6 +561,7 @@ struct qmp_phy { * @dev: device * @serdes: iomapped memory space for phy's serdes * @dp_com: iomapped memory space for phy's dp_com control block + * @qscratch_base: iomapped memory space for qscratch region * * @clks: array of clocks required by phy * @resets: array of resets required by phy @@ -572,6 +576,7 @@ struct qcom_qmp { struct device *dev; void __iomem *serdes; void __iomem *dp_com; + void __iomem *qscratch_base; struct clk_bulk_data *clks; struct reset_control **resets; @@ -582,6 +587,7 @@ struct qcom_qmp { struct mutex phy_mutex; int init_count; + enum phy_mode mode; }; static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) @@ -1024,6 +1030,26 @@ static int qcom_qmp_phy_exit(struct phy *phy) return 0; } +static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qcom_qmp *qmp = qphy->qmp; + + qmp->mode = mode; + + /* Update VBUS override in qscratch register */ + if (qmp->qscratch_base) { + if (mode == PHY_MODE_USB_DEVICE) + qphy_setbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL, + LANE0_PWR_PRESENT); + else + qphy_clrbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL, + LANE0_PWR_PRESENT); + } + + return 0; +} + static int qcom_qmp_phy_vreg_init(struct device *dev) { struct qcom_qmp *qmp = dev_get_drvdata(dev); @@ -1133,6 +1159,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) static const struct phy_ops qcom_qmp_phy_gen_ops = { .init = qcom_qmp_phy_init, .exit = qcom_qmp_phy_exit, + .set_mode = qcom_qmp_phy_set_mode, .owner = THIS_MODULE, }; @@ -1273,7 +1300,18 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) qmp->dp_com = base; } + /* Check if platform uses qscratch wrapper */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qscratch"); + if (res) { + /* Can't request region as used by other phy and glue drivers */ + qmp->qscratch_base = devm_ioremap(dev, res->start, + resource_size(res)); + if (IS_ERR(qmp->qscratch_base)) + return PTR_ERR(qmp->qscratch_base); + } + mutex_init(&qmp->phy_mutex); + qmp->mode = PHY_MODE_INVALID; ret = qcom_qmp_phy_clk_init(dev); if (ret)