From patchwork Thu Jan 25 21:20:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 10184813 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DABCA60383 for ; Thu, 25 Jan 2018 21:20:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 92C2D28AFC for ; Thu, 25 Jan 2018 21:20:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9186528B08; Thu, 25 Jan 2018 21:20:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8842828AFC for ; Thu, 25 Jan 2018 21:20:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751473AbeAYVU2 (ORCPT ); Thu, 25 Jan 2018 16:20:28 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:40816 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751443AbeAYVU0 (ORCPT ); Thu, 25 Jan 2018 16:20:26 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0D5926032C; Thu, 25 Jan 2018 21:20:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516915226; bh=57REO9kKfdMudkijKEvJ4Giip4+OJgokvIqOXznVhmg=; h=From:To:Cc:Subject:Date:From; b=AHphsRxdhH+LGZDrTEFHu/dvf5DhlQgF2GfBm4rfaeaiyIG/gWdwOaRwKKT3XFluX eoHj7Ji3CyXLtPfCtRYu6uEwE4YRoHsITYuGicEnXgu1JfHxjnJ2wYzlOK+b1IwtAY MsJ9v2/gQ+AymNyWbhLRBCXW09D6oLfwlHSSSyPk= Received: from timur-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: timur@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D7C4E6028B; Thu, 25 Jan 2018 21:20:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516915225; bh=57REO9kKfdMudkijKEvJ4Giip4+OJgokvIqOXznVhmg=; h=From:To:Cc:Subject:Date:From; b=Vq0WmPHGdO93SloD5ucK0ju0Os3pEVuQarzyWlHsQcNHylPFzUASgCF0FUBo8Sf+h WFCeQ3MoPt3BPQ0gb8rQ+34hJL85OzlgghynRpoXPzxsp4MtITgC5SrDjMBq8NIHGP ribCvk+zE/vjqo2yHZP2215wJJuXCI61lqc+QCnM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D7C4E6028B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=timur@codeaurora.org From: Timur Tabi To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, Bjorn Andersson , Stephen Boyd , Linus Walleij Cc: timur@codeaurora.org Subject: [PATCH] pinctrl: msm: allow the gpio base to be configurable Date: Thu, 25 Jan 2018 15:20:09 -0600 Message-Id: <1516915209-28295-1-git-send-email-timur@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add an integer to the msm_pinctrl_soc_data struct that pinctrl-msm client drivers can use to specify the gpio base. This is useful if the client driver wants to register multiple TLMM devices, because each one needs a distinct base. pinctrl-msm currently sets the base to 0, which ensures that GPIOs of the first TLMM are numbered 0..n-1. It could specify -1 as the base, which would tell gpiolib to choose a unique base, but this has the side-effect of choosing a non-zero base for all TLMMs: gpiochip_find_base: found new base at 437 gpio gpiochip0: (QCOM8002:00): added GPIO chardev (254:0) gpiochip_setup_dev: registered GPIOs 437 to 511 on device: gpiochip0 (QCOM8002:00) gpio gpiochip0: (QCOM8002:00): created GPIO range 0->74 ==> QCOM8002:00 PIN 0->74 gpiochip_find_base: found new base at 362 gpio gpiochip1: (QCOM8002:01): added GPIO chardev (254:1) gpiochip_setup_dev: registered GPIOs 362 to 436 on device: gpiochip1 (QCOM8002:01) gpio gpiochip1: (QCOM8002:01): created GPIO range 0->74 ==> QCOM8002:01 PIN 0->74 Signed-off-by: Timur Tabi --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 +- drivers/pinctrl/qcom/pinctrl-msm.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index b7b6849625ec..4dc76e15bd14 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -901,7 +901,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) return -EINVAL; chip = &pctrl->chip; - chip->base = 0; + chip->base = pctrl->soc->base; chip->ngpio = ngpio; chip->label = dev_name(pctrl->dev); chip->parent = pctrl->dev; diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index 9b9feea540ff..cab26f99011d 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -107,6 +107,7 @@ struct msm_pingroup { * @ngroups: The numbmer of entries in @groups. * @ngpio: The number of pingroups the driver should expose as GPIOs. * @pull_no_keeper: The SoC does not support keeper bias. + * @base: The base GPIO (normally 0 if only one TLMM block) */ struct msm_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; @@ -117,6 +118,7 @@ struct msm_pinctrl_soc_data { unsigned ngroups; unsigned ngpios; bool pull_no_keeper; + int base; }; int msm_pinctrl_probe(struct platform_device *pdev,