From patchwork Thu Feb 8 17:31:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10207529 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 52EBD602D8 for ; Thu, 8 Feb 2018 17:32:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 416AC29524 for ; Thu, 8 Feb 2018 17:32:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35C9029529; Thu, 8 Feb 2018 17:32:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B185729524 for ; Thu, 8 Feb 2018 17:32:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752054AbeBHRcI (ORCPT ); Thu, 8 Feb 2018 12:32:08 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:36010 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752018AbeBHRcG (ORCPT ); Thu, 8 Feb 2018 12:32:06 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 76D0560B67; Thu, 8 Feb 2018 17:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1518111126; bh=FTBCT1zC4lQVJDlCNzXt/4Y/cFWZzhS/V7XYmNf+q14=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XJbAXMmMgxc3bpfY1Mb/9v9+z8A0aPQFFL3KljANotjP1CcSmMBh+EQDrA22VWk6j 8AEookkWBEHaiqcidOzu/JJQvr2QS5KsqinYZjO2AuQe1My/a0CFy6gOd41P4zvqVG Shao8H7oLj7ot8NFjJMIFStkN/ccVuYx7lDV+JRg= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 32F0B60B67; Thu, 8 Feb 2018 17:32:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1518111125; bh=FTBCT1zC4lQVJDlCNzXt/4Y/cFWZzhS/V7XYmNf+q14=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YZVzYkdqaPXmRztwl8K2FwL+4KYo3he4mWmz0Vz+i9cR8qQ+dfL/ho1NafglFP3Zg 1xltYd+HD4T74OM3lvSI43ILYo62/gIxxjkCQSjK4tjEJ/46ijVkn16Wz7vlt03R9d s9DQMKdxX5t5OfB8RrCDE0jnl9/ZLKDpf+WwqTZ4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 32F0B60B67 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 6/8] drm/msm/adreno: Convert the show/crash file format Date: Thu, 8 Feb 2018 10:31:55 -0700 Message-Id: <1518111117-7408-7-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518111117-7408-1-git-send-email-jcrouse@codeaurora.org> References: <1518111117-7408-1-git-send-email-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the format of the 'show' debugfs file and the crash dump to a format resembling YAML. This should be easier to parse and be more flexible for future changes and expansions. Signed-off-by: Jordan Crouse --- Documentation/gpu/drm-msm-crash-dump.txt | 29 +++++++++++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 ++++++++++++++--------- 2 files changed, 43 insertions(+), 9 deletions(-) create mode 100644 Documentation/gpu/drm-msm-crash-dump.txt diff --git a/Documentation/gpu/drm-msm-crash-dump.txt b/Documentation/gpu/drm-msm-crash-dump.txt new file mode 100644 index 0000000..ec56640 --- /dev/null +++ b/Documentation/gpu/drm-msm-crash-dump.txt @@ -0,0 +1,29 @@ +# drm/msm GPU crash dump format +# +# This is a description of the format of the drm/msm GPU crash dump format that +# can be read from /sys/kernel/dri/X/show or from devcoredump following a GPU +# hang or fault + +--- +kernel: # [string] The kernel version as printed by UTS_RELEASE +module: # [string] The module that generated the crash dump +time: # [seconds.microseconds] The kernel time at crash +comm: # [string] comm string for the binary that generated the fault + # (if known) +cmdline: # [string] the cmdline for the binary that generated the fault + # (if known) +revision: # [ id core.major.minor.patchlevel] The GPU id followed by the + # individual components of the id separated by dots +rbbm-status: # [hex] The current value of RBBM_STATUS which shows what GPU + # components were in use at the time of the crash +ringbuffer: # Ringbuffer data. There will be a sequence for each ringbuffer + -id: # [decimal] Ringbuffer identifier (0 based index) + last-fence: # [decimal] The last fence issued on the ring + retired-fence: # [decimal] THe last fence retired on the ring + rptr: # [decimal] The current read pointer (rptr) for the ring + wptr: # [decimal] The current write pointer (wptr) for the ring +registers: # Sets of register values. This section can be used multiple + # times for different ranges of registers. Each register will be + # on its own line. + - [offset, value] # offset: [hex] byte offset of the register + # value: [hex] value of the register diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index e86238ce..920db2e 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -458,23 +458,28 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, if (IS_ERR_OR_NULL(state)) return; - drm_printf(p, "status: %08x\n", state->rbbm_status); drm_printf(p, "revision: %d (%d.%d.%d.%d)\n", adreno_gpu->info->revn, adreno_gpu->rev.core, adreno_gpu->rev.major, adreno_gpu->rev.minor, adreno_gpu->rev.patchid); - for (i = 0; i < gpu->nr_rings; i++) { - drm_printf(p, "rb %d: fence: %d/%d\n", i, - state->ring[i].fence, state->ring[i].seqno); + drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); + + drm_printf(p, "ringbuffer:\n"); - drm_printf(p, " rptr: %d\n", state->ring[i].rptr); - drm_printf(p, "rb wptr: %d\n", state->ring[i].wptr); + for (i = 0; i < gpu->nr_rings; i++) { + drm_printf(p, " - id: %d\n", i); + drm_printf(p, " last-fence: %d\n", state->ring[i].seqno); + drm_printf(p, " retired-fence: %d\n", state->ring[i].fence); + drm_printf(p, " rptr: %d\n", state->ring[i].rptr); + drm_printf(p, " wptr: %d\n", state->ring[i].wptr); } - drm_printf(p, "IO:region %s 00000000 00020000\n", gpu->name); - for (i = 0; i < state->nr_registers; i++) { - drm_printf(p, "IO:R %08x %08x\n", + drm_printf(p, "registers:\n"); + drm_printf(p, " - [offset, value]\n"); + + for(i = 0; i < state->nr_registers; i++) { + drm_printf(p, " - [0x%04x, 0x%08x]\n", state->registers[i * 2] << 2, state->registers[(i * 2) + 1]); }