| Message ID | 1521800336-19266-9-git-send-email-sricharan@codeaurora.org (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote: > +#include "qcom-ipq4019.dtsi" > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; > + compatible = "qcom,ipq4019"; The board should set these, so you shouldn't need to specify them here. And you should be able to find a more specific compatible for the board. > + [..] > + qpic-nand@79b0000 { > + status = "ok"; No pinmux for the qpic on these boards? > + }; > + }; > +}; Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 3/27/2018 10:50 PM, Bjorn Andersson wrote: > On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote: >> +#include "qcom-ipq4019.dtsi" >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/gpio/gpio.h> >> + >> +/ { >> + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; >> + compatible = "qcom,ipq4019"; > > The board should set these, so you shouldn't need to specify them here. > And you should be able to find a more specific compatible for the board. > ok. agree. As mentioned earlier, will correct the compatible in all boards. >> + > [..] >> + qpic-nand@79b0000 { >> + status = "ok"; > > No pinmux for the qpic on these boards? > clearly missed it and was lucky that bootloader was doing it in this case. Will add it. Regards, Sricharan
On Freitag, 23. März 2018 15:48:51 CEST Sricharan R wrote: > Add the common data for all dk07 based boards. > > Reviewed-by: Abhishek Sahu <absahu@codeaurora.org> > Signed-off-by: Sricharan R <sricharan@codeaurora.org> > --- > arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 69 +++++++++++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi The no-map reserved-memory for tz and smem are missing. Linux doesn't have control over these regions and they are placed in the middle of the ram before Linux even starts. And u-boot is also not adding these ranges automatically. reserved-memory { #address-cells = <0x1>; #size-cells = <0x1>; ranges; smem@87e00000 { reg = <0x87e00000 0x080000>; no-map; }; tz@87e80000 { reg = <0x87e80000 0x180000>; no-map; }; }; This can either (depending on HW/SW configuration) lead to a failed boot [1] or to runtime crashes like: root@OpenWrt:/# /tmp/memory-allocator-test main 0 [ 571.758058] Unhandled fault: imprecise external abort (0xc06) at 0x01715ff8 [ 571.758099] pgd = cebec000 [ 571.763826] [01715ff8] *pgd=8e7fa835, *pte=87e7f75f, *ppte=87e7fc7f Bus error I would not know how to disable QSEE on these boards and thus would assume that it should be part of this dtsi. Kind regards, Sven [1] https://www.spinics.net/lists/linux-arm-msm/msg21536.html
Hi Sven, On 4/18/2018 12:29 PM, Sven Eckelmann wrote: > On Freitag, 23. März 2018 15:48:51 CEST Sricharan R wrote: >> Add the common data for all dk07 based boards. >> >> Reviewed-by: Abhishek Sahu <absahu@codeaurora.org> >> Signed-off-by: Sricharan R <sricharan@codeaurora.org> >> --- >> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 69 +++++++++++++++++++++++++++ >> 1 file changed, 69 insertions(+) >> create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi > > The no-map reserved-memory for tz and smem are missing. Linux doesn't have > control over these regions and they are placed in the middle of the ram before > Linux even starts. And u-boot is also not adding these ranges automatically. > > reserved-memory { > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges; > > smem@87e00000 { > reg = <0x87e00000 0x080000>; > no-map; > }; > > tz@87e80000 { > reg = <0x87e80000 0x180000>; > no-map; > }; > }; > > This can either (depending on HW/SW configuration) lead to a failed boot [1] > or to runtime crashes like: > > root@OpenWrt:/# /tmp/memory-allocator-test > main 0 > [ 571.758058] Unhandled fault: imprecise external abort (0xc06) at 0x01715ff8 > [ 571.758099] pgd = cebec000 > [ 571.763826] [01715ff8] *pgd=8e7fa835, *pte=87e7f75f, *ppte=87e7fc7f > Bus error > > I would not know how to disable QSEE on these boards and thus would assume > that it should be part of this dtsi. As we discussed offline, i agree that the smem and tz reserved memory nodes need to be added. It still boots today without that, but would abort when that memory region is allocated and written. I will add the reserved-memory node for that in V6 along with other comments. Regards, Sricharan
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi new file mode 100644 index 0000000..4cc519f --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018, The Linux Foundation. All rights reserved. + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; + compatible = "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MB */ + }; + + aliases { + serial0 = &blsp1_uart1; + serial1 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + soc { + pinctrl@1000000 { + serial_0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + }; + + serial@78af000 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + dma@7884000 { + status = "ok"; + }; + + i2c@78b7000 { /* BLSP1 QUP2 */ + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + dma@7984000 { + status = "ok"; + }; + + qpic-nand@79b0000 { + status = "ok"; + }; + }; +};