From patchwork Mon Apr 2 19:06:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 10320239 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B653F60532 for ; Mon, 2 Apr 2018 19:08:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A66412239C for ; Mon, 2 Apr 2018 19:08:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9AF3628806; Mon, 2 Apr 2018 19:08:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2027A2239C for ; Mon, 2 Apr 2018 19:08:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756794AbeDBTGs (ORCPT ); Mon, 2 Apr 2018 15:06:48 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42232 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755107AbeDBTGm (ORCPT ); Mon, 2 Apr 2018 15:06:42 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 72ADE6055D; Mon, 2 Apr 2018 19:06:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522696001; bh=Cy8/4TyQ1VUmAg+Q6qTAguoMnhcWm7Jc0TpasDD11WA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VAHQiJFNvpEQelqNcljyhg0H7mArZZhGio0ThMymgoJYpc0RlSrjRdbyVuIRpCimy Lw1FXEgyYHkVfssLq9M1cXfIMcd2MvVDdpkgM8uKtlyGbwoiFMFskQeLSVVzHAQ+/J 4OLUCFISbXgC/+WOldX9OW+x0QX5P11fLGO6rZ8c= Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E4F0F60F6C; Mon, 2 Apr 2018 19:06:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522696000; bh=Cy8/4TyQ1VUmAg+Q6qTAguoMnhcWm7Jc0TpasDD11WA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MKUXYhjqGuJj7FvnBH0nyaj6wbdeLIDNuhkT4yaZTuNDWw6z1G/hboUa598f9dXUX 372Few8VK1SYu9VNN/5Iy7eYl1pqpwksYxuoenU2Kbub/4WU8AitH2tbLIWq2bgaGr +v6Zf4UdgOeIdQ8/L8P82hUuq3MZNM5wtYjIqpvc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E4F0F60F6C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: jeffrey.t.kirsher@intel.com Cc: netdev@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , intel-wired-lan@lists.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 3/7] igbvf: eliminate duplicate barriers on weakly-ordered archs Date: Mon, 2 Apr 2018 15:06:26 -0400 Message-Id: <1522695990-31082-4-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522695990-31082-1-git-send-email-okaya@codeaurora.org> References: <1522695990-31082-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP memory-barriers.txt has been updated as follows: "When using writel(), a prior wmb() is not needed to guarantee that the cache coherent memory writes have completed before writing to the MMIO region." Remove old IA-64 comments in the code along with unneeded wmb() in front of writel(). There are places in the code where wmb() has been used as a double barrier for CPU and IO in place of smp_wmb() and wmb() as an optimization. For such places, keep the wmb() but replace the following writel() with writel_relaxed() to have a sequence as wmb() writel_relaxed() mmio_wb() Signed-off-by: Sinan Kaya --- drivers/net/ethernet/intel/igbvf/netdev.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c index e2b7502..d9f186a 100644 --- a/drivers/net/ethernet/intel/igbvf/netdev.c +++ b/drivers/net/ethernet/intel/igbvf/netdev.c @@ -246,12 +246,6 @@ static void igbvf_alloc_rx_buffers(struct igbvf_ring *rx_ring, else i--; - /* Force memory writes to complete before letting h/w - * know there are new descriptors to fetch. (Only - * applicable for weak-ordered memory model archs, - * such as IA-64). - */ - wmb(); writel(i, adapter->hw.hw_addr + rx_ring->tail); } } @@ -2289,16 +2283,16 @@ static inline void igbvf_tx_queue_adv(struct igbvf_adapter *adapter, } tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd); - /* Force memory writes to complete before letting h/w - * know there are new descriptors to fetch. (Only - * applicable for weak-ordered memory model archs, - * such as IA-64). + + /* We use this memory barrier to make certain all of the + * status bits have been updated before next_to_watch is + * written. */ wmb(); tx_ring->buffer_info[first].next_to_watch = tx_desc; tx_ring->next_to_use = i; - writel(i, adapter->hw.hw_addr + tx_ring->tail); + writel_relaxed(i, adapter->hw.hw_addr + tx_ring->tail); /* we need this if more than one processor can write to our tail * at a time, it synchronizes IO on IA64/Altix systems */