From patchwork Wed May 2 07:14:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 10375045 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0E52F6037D for ; Wed, 2 May 2018 07:14:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EDA2B28CE3 for ; Wed, 2 May 2018 07:14:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1D9228CE6; Wed, 2 May 2018 07:14:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E3F628CE3 for ; Wed, 2 May 2018 07:14:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750928AbeEBHOm (ORCPT ); Wed, 2 May 2018 03:14:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:52836 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750822AbeEBHOk (ORCPT ); Wed, 2 May 2018 03:14:40 -0400 Received: from localhost (unknown [104.132.1.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 221932366C; Wed, 2 May 2018 07:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1525245280; bh=GFf0nWh5874KQZaYROMUuJAqT9pFfwdtYOdjeIhg2J0=; h=To:From:In-Reply-To:Cc:References:Subject:Date:From; b=sRzRWoccLM7//Lt7vJgiFtlZYBiNOMJP/DFXw8fMmBam0ZoJkkiBR8bVTSu0yPJwd fg0bJe3VrkngaJ5q/2Uy8f0tewh6DtNbYUfDCFnX/jpFZD7cxH4ZgX/QBNxzR8XDYd 35jMe96phtewhQzQWObEaWjlDvDy0LLwuc3XqWd8= MIME-Version: 1.0 To: Amit Nischal , Michael Turquette , Stephen Boyd From: Stephen Boyd In-Reply-To: <1525105210-8689-3-git-send-email-anischal@codeaurora.org> Cc: Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Amit Nischal References: <1525105210-8689-1-git-send-email-anischal@codeaurora.org> <1525105210-8689-3-git-send-email-anischal@codeaurora.org> Message-ID: <152524527938.138124.8505584329413678951@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH v6 2/3] clk: qcom: Add support for BRANCH_NO_DELAY flag for branch clocks Date: Wed, 02 May 2018 00:14:39 -0700 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Quoting Amit Nischal (2018-04-30 09:20:09) > diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h > index 284df3f..5d621f3 100644 > --- a/drivers/clk/qcom/clk-branch.h > +++ b/drivers/clk/qcom/clk-branch.h > @@ -42,6 +42,7 @@ struct clk_branch { > #define BRANCH_HALT_ENABLE 1 /* pol: 0 = halt */ > #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) > #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ > +#define BRANCH_NO_DELAY 3 /* No bit to check; without delay */ Let's call it BRANCH_HALT_SKIP and indicate that it's skipping the halt bit check. Technically there is a bit to check, we just refuse to check it. I've reworked and applied this patch as below. From f9ddbd74bf4940d3b7a0eb076eb254833660643c Mon Sep 17 00:00:00 2001 From: Amit Nischal Date: Mon, 30 Apr 2018 21:50:09 +0530 Subject: [PATCH] clk: qcom: Add support for BRANCH_HALT_SKIP flag for branch clocks There could be few clocks where the clock status bit is not required to be polled as the clock on/off would be controlled by enabling/disabling external source. Add support for the same by introducing new flag named as 'BRANCH_HALT_SKIP'. Signed-off-by: Amit Nischal [sboyd@kernel.org: Rename flag to BRANCH_HALT_SKIP] Signed-off-by: Stephen Boyd --- drivers/clk/qcom/clk-branch.c | 7 +++++-- drivers/clk/qcom/clk-branch.h | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index 26f7af315066..c58c5538b1b6 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -77,8 +77,11 @@ static int clk_branch_wait(const struct clk_branch *br, bool enabling, bool voted = br->halt_check & BRANCH_VOTED; const char *name = clk_hw_get_name(&br->clkr.hw); - /* Skip checking halt bit if the clock is in hardware gated mode */ - if (clk_branch_in_hwcg_mode(br)) + /* + * Skip checking halt bit if we're explicitly ignoring the bit or the + * clock is in hardware gated mode + */ + if (br->halt_check == BRANCH_HALT_SKIP || clk_branch_in_hwcg_mode(br)) return 0; if (br->halt_check == BRANCH_HALT_DELAY || (!enabling && voted)) { diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 284df3f3c55f..1702efb1c511 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -42,6 +42,7 @@ struct clk_branch { #define BRANCH_HALT_ENABLE 1 /* pol: 0 = halt */ #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ +#define BRANCH_HALT_SKIP 3 /* Don't check halt bit */ struct clk_regmap clkr; };