From patchwork Wed May 2 21:06:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manu Gautam X-Patchwork-Id: 10376551 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6760F6038F for ; Wed, 2 May 2018 21:08:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 58B3429022 for ; Wed, 2 May 2018 21:08:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D03A29024; Wed, 2 May 2018 21:08:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE22829022 for ; Wed, 2 May 2018 21:08:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751585AbeEBVGp (ORCPT ); Wed, 2 May 2018 17:06:45 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59568 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750945AbeEBVGl (ORCPT ); Wed, 2 May 2018 17:06:41 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1EFCD60AD4; Wed, 2 May 2018 21:06:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525295200; bh=+wsU8sPexnHjC0GzZJAdrFRq+pQh2CLo8QB4Lr940Hg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nj2+i6tJMlC9FfBc0zqvQgYTMQvY8dpPBWMxvKSJeJ9pdEPr0ANaSPsKl77fvOz6T WLMZZVgRnDvsu0LmcN3eS4Lk3HCwk2X5wzek6Fm9VunRiK7ckwwrlzwiuUqVADir1/ uZ6x9slNNlJKCXcGkbW1YJkz+eyH+BSeIqel2q/Y= Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C626F607E1; Wed, 2 May 2018 21:06:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525295199; bh=+wsU8sPexnHjC0GzZJAdrFRq+pQh2CLo8QB4Lr940Hg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JIvW9BIl+r1Ul4IQdI1jqyGkb0WeLWVH1ql5W13mQC6Qubmv/qeQ07mbs1QlD1FAJ 7FAvvOJasr57hFMAH5Es09rYjvSQWmF/MDykn8MQSbfgtOwDKE3C7hzgLHznWjL2Rh GkMCu5QzXIjxg0yLp5iaFgJ+hFiyyJhqNWW37q+Q= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C626F607E1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I , robh@kernel.org, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, evgreen@chromium.org, Vivek Gautam , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam Subject: [PATCH v5 2/7] phy: qcom-qmp: Enable pipe_clk before PHY initialization Date: Thu, 3 May 2018 02:36:09 +0530 Message-Id: <1525295174-15995-3-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525295174-15995-1-git-send-email-mgautam@codeaurora.org> References: <1525295174-15995-1-git-send-email-mgautam@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP QMP PHY for USB/PCIE requires pipe_clk for locking of retime buffers at the pipe interface. Driver checks for PHY_STATUS without enabling pipe_clk due to which phy_init() fails with initialization timeout. Though pipe_clk is output from PHY (after PLL is programmed during initialization sequence) to GCC clock_ctl and then fed back to PHY but for PHY_STATUS register to reflect successful initialization pipe_clk from GCC must be present. Since, clock driver now ignores status_check for pipe_clk on clk_enable/disable, driver can safely enable/disable pipe_clk from phy_init/exit. Signed-off-by: Manu Gautam Reviewed-by: Douglas Anderson --- drivers/phy/qualcomm/phy-qcom-qmp.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 6470c5d..fddb1c9 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -793,19 +793,6 @@ static void qcom_qmp_phy_configure(void __iomem *base, } } -static int qcom_qmp_phy_poweron(struct phy *phy) -{ - struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; - int ret; - - ret = clk_prepare_enable(qphy->pipe_clk); - if (ret) - dev_err(qmp->dev, "pipe_clk enable failed, err=%d\n", ret); - - return ret; -} - static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) { const struct qmp_phy_cfg *cfg = qmp->cfg; @@ -974,6 +961,12 @@ static int qcom_qmp_phy_init(struct phy *phy) } } + ret = clk_prepare_enable(qphy->pipe_clk); + if (ret) { + dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret); + goto err_clk_enable; + } + /* Tx, Rx, and PCS configurations */ qcom_qmp_phy_configure(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num); /* Configuration for other LANE for USB-DP combo PHY */ @@ -1019,6 +1012,8 @@ static int qcom_qmp_phy_init(struct phy *phy) return ret; err_pcs_ready: + clk_disable_unprepare(qphy->pipe_clk); +err_clk_enable: if (cfg->has_lane_rst) reset_control_assert(qphy->lane_rst); err_lane_rst: @@ -1283,7 +1278,6 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) static const struct phy_ops qcom_qmp_phy_gen_ops = { .init = qcom_qmp_phy_init, .exit = qcom_qmp_phy_exit, - .power_on = qcom_qmp_phy_poweron, .set_mode = qcom_qmp_phy_set_mode, .owner = THIS_MODULE, };