From patchwork Thu May 3 20:14:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthikeyan Ramasubramanian X-Patchwork-Id: 10379151 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 20DD160327 for ; Thu, 3 May 2018 20:15:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0FB8229271 for ; Thu, 3 May 2018 20:15:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0455929276; Thu, 3 May 2018 20:15:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9F7C129271 for ; Thu, 3 May 2018 20:15:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751342AbeECUPM (ORCPT ); Thu, 3 May 2018 16:15:12 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:60450 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750962AbeECUPH (ORCPT ); Thu, 3 May 2018 16:15:07 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 055E7607E5; Thu, 3 May 2018 20:15:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525378507; bh=21jsPEiMtXMDUAGBlt6UnyH9jb6GRVdZQMBbqCZqwH8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GK/bRq5dUBnIchwb6gilYRHXnPLl2MzUNUDxBKOsZG5RWmMr2mib/3wo3avxxz/Qe Nn2LnXJlaVDLLaaRDLnWh/dXgqUDV/uJBMQ8U2j7JVCM73YymVhqVhkZsy7WiYu9CI gMeSPc3WTcwgAOloJp5zynrIrpsGemwiGEGpAy4M= Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: kramasub@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6BC5760C55; Thu, 3 May 2018 20:15:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525378506; bh=21jsPEiMtXMDUAGBlt6UnyH9jb6GRVdZQMBbqCZqwH8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LosBfEnsoGMkLt2uN6kgBB4GpycDoGdRgpFfFSjiwkmPNutqCAzhooxXTa4sZWNHb bNtVRi7SHJBevN0EhyG8dAc6svyqtHNj5TU5pF4ETkyJqIc0+UbGl7ylkJfo+963ps aR3LN9HZnzprJ4p9cKXSNnJ5jan6xv+tFyeLixMw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6BC5760C55 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=kramasub@codeaurora.org From: Karthikeyan Ramasubramanian To: gregkh@linuxfoundation.org, jslaby@suse.com Cc: Karthikeyan Ramasubramanian , linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, evgreen@chromium.org, acourbot@chromium.org, swboyd@chromium.org, dianders@chromium.org, mka@chromium.org, bjorn.andersson@linaro.org Subject: [PATCH v3 5/8] tty: serial: qcom_geni_serial: Remove unnecessary memory barrier Date: Thu, 3 May 2018 14:14:37 -0600 Message-Id: <1525378480-10296-6-git-send-email-kramasub@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525378480-10296-1-git-send-email-kramasub@codeaurora.org> References: <1525378480-10296-1-git-send-email-kramasub@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP While initiating TX, only the register reads need to be ordered. The register write order either is achieved due to data dependency or is not required. Use readl to achieve the read order and remove the unnecessary barrier. Signed-off-by: Karthikeyan Ramasubramanian Reviewed-by: Evan Green --- drivers/tty/serial/qcom_geni_serial.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 018ba21..b0b1aa3 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -417,20 +417,18 @@ static void qcom_geni_serial_start_tx(struct uart_port *uport) u32 status; if (port->xfer_mode == GENI_SE_FIFO) { - status = readl_relaxed(uport->membase + SE_GENI_STATUS); + /* + * readl ensures reading & writing of IRQ_EN register + * is not re-ordered before checking the status of the + * Serial Engine. + */ + status = readl(uport->membase + SE_GENI_STATUS); if (status & M_GENI_CMD_ACTIVE) return; if (!qcom_geni_serial_tx_empty(uport)) return; - /* - * Ensure writing to IRQ_EN & watermark registers are not - * re-ordered before checking the status of the Serial - * Engine and TX FIFO - */ - mb(); - irq_en = readl_relaxed(uport->membase + SE_GENI_M_IRQ_EN); irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; @@ -894,7 +892,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport, static unsigned int qcom_geni_serial_tx_empty(struct uart_port *uport) { - return !readl_relaxed(uport->membase + SE_GENI_TX_FIFO_STATUS); + return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS); } #ifdef CONFIG_SERIAL_QCOM_GENI_CONSOLE