From patchwork Fri May 11 14:49:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajesh Yadav X-Patchwork-Id: 10394537 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4D24F60170 for ; Fri, 11 May 2018 14:51:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AE3B28E9A for ; Fri, 11 May 2018 14:51:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35FB228EC0; Fri, 11 May 2018 14:51:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 619D328F2E for ; Fri, 11 May 2018 14:51:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753167AbeEKOvA (ORCPT ); Fri, 11 May 2018 10:51:00 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:52298 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753185AbeEKOvA (ORCPT ); Fri, 11 May 2018 10:51:00 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A17EC6019F; Fri, 11 May 2018 14:50:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526050259; bh=bCpZdbFyZKS0I8DCJUV6TdJiMCy4bRJDJbfHQwZYVKU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iEWagWB0+2BkVKE0yXzKDwr/43cSkgVB29zr9u++r2Do/CQ6bBmZAoSMNOhaKTA2C ECV33rFo1rvCi2O5o/w+JVBX3Dq7rAvGMkZoOujNvgiLqU9/4j+Xu9iJPy5KJSmw2n LfH7KNySYAD0Efyftt1scfSMc63IXbkOJdNfgQJw= Received: from ryadav-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ryadav@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5C6B96081B; Fri, 11 May 2018 14:50:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526050258; bh=bCpZdbFyZKS0I8DCJUV6TdJiMCy4bRJDJbfHQwZYVKU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BLSjGufJjZ5+wWifwdSFq6BSWphzOQUIEKFeaWD5tYYZeXm2clUDa6KytmX+Lf150 +UQ8Y6Su6IcNIAmcy6LAkcbGT45YhvcFVrF1QdrMLxqHNmpyJzXuinPS++iNGWyUrj naz0DBX+jl2ldEawceUFjjYQ/1o7Brn3Rrdqev1s= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5C6B96081B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ryadav@codeaurora.org From: Rajesh Yadav To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: Rajesh Yadav , robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org Subject: [DPU PATCH v2 12/12] drm/msm/dpu: add error handling in dpu_core_perf_crtc_update Date: Fri, 11 May 2018 20:19:38 +0530 Message-Id: <1526050178-31893-13-git-send-email-ryadav@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526050178-31893-1-git-send-email-ryadav@codeaurora.org> References: <1526050178-31893-1-git-send-email-ryadav@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP dpu_core_perf_crtc_update() is responsible for aggregating the data bus bandwidth and dpu core clock rate requirements and request the same for all active crtcs. Currently, there is no error handling support in this function so there is no way caller can know if the perf request fails. This change adds error handling code in dpu_core_perf_crtc_update(). The caller side error handling is not added in this patch. Signed-off-by: Rajesh Yadav Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 37 ++++++++++++++++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 3 ++- 2 files changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index d3a1ed9..85c0229 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -248,7 +248,7 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, return 0; } -static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, +static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, struct drm_crtc *crtc, u32 bus_id) { u64 bw_sum_of_intfs = 0, bus_ab_quota, bus_ib_quota; @@ -257,6 +257,7 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, = dpu_crtc_get_client_type(crtc); struct drm_crtc *tmp_crtc; struct dpu_crtc_state *dpu_cstate; + int ret = 0; drm_for_each_crtc(tmp_crtc, crtc->dev) { if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) && @@ -286,25 +287,28 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, switch (curr_client_type) { case NRT_CLIENT: - dpu_power_data_bus_set_quota(&kms->phandle, kms->core_client, + ret = dpu_power_data_bus_set_quota( + &kms->phandle, kms->core_client, DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, bus_id, bus_ab_quota, bus_ib_quota); DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "nrt", - bus_id, bus_ab_quota, bus_ib_quota); + bus_id, bus_ab_quota, bus_ib_quota); break; case RT_CLIENT: - dpu_power_data_bus_set_quota(&kms->phandle, kms->core_client, + ret = dpu_power_data_bus_set_quota( + &kms->phandle, kms->core_client, DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, bus_id, bus_ab_quota, bus_ib_quota); DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "rt", - bus_id, bus_ab_quota, bus_ib_quota); + bus_id, bus_ab_quota, bus_ib_quota); break; default: DPU_ERROR("invalid client type:%d\n", curr_client_type); break; } + return ret; } /** @@ -399,7 +403,7 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) return clk_rate; } -void dpu_core_perf_crtc_update(struct drm_crtc *crtc, +int dpu_core_perf_crtc_update(struct drm_crtc *crtc, int params_changed, bool stop_req) { struct dpu_core_perf_params *new, *old; @@ -410,16 +414,17 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc, int i; struct msm_drm_private *priv; struct dpu_kms *kms; + int ret; if (!crtc) { DPU_ERROR("invalid crtc\n"); - return; + return -EINVAL; } kms = _dpu_crtc_get_kms(crtc); if (!kms || !kms->catalog) { DPU_ERROR("invalid kms\n"); - return; + return -EINVAL; } priv = kms->dev->dev_private; @@ -482,8 +487,14 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc, update_bus, update_clk); for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { - if (update_bus & BIT(i)) - _dpu_core_perf_crtc_update_bus(kms, crtc, i); + if (update_bus & BIT(i)) { + ret = _dpu_core_perf_crtc_update_bus(kms, crtc, i); + if (ret) { + DPU_ERROR("crtc-%d: failed to update bw vote for bus-%d\n", + crtc->base.id, i); + return ret; + } + } } /* @@ -495,15 +506,17 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc, DPU_EVT32(kms->dev, stop_req, clk_rate); - if (_dpu_core_perf_set_core_clk_rate(kms, clk_rate)) { + ret = _dpu_core_perf_set_core_clk_rate(kms, clk_rate); + if (ret) { DPU_ERROR("failed to set %s clock rate %llu\n", kms->perf.core_clk->clk_name, clk_rate); - return; + return ret; } kms->perf.core_clk_rate = clk_rate; DPU_DEBUG("update clk rate = %lld HZ\n", clk_rate); } + return 0; } #ifdef CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index cde48df..440d6a2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -91,8 +91,9 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, * @crtc: Pointer to crtc * @params_changed: true if crtc parameters are modified * @stop_req: true if this is a stop request + * return: zero if success, or error code otherwise */ -void dpu_core_perf_crtc_update(struct drm_crtc *crtc, +int dpu_core_perf_crtc_update(struct drm_crtc *crtc, int params_changed, bool stop_req); /**