From patchwork Mon Jun 18 13:32:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sravanthi Kollukuduru X-Patchwork-Id: 10471459 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9027B6029B for ; Mon, 18 Jun 2018 13:34:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DA41289D5 for ; Mon, 18 Jun 2018 13:34:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 700FA289E5; Mon, 18 Jun 2018 13:34:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 82F00289D5 for ; Mon, 18 Jun 2018 13:34:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934243AbeFRNeB (ORCPT ); Mon, 18 Jun 2018 09:34:01 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:39986 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933585AbeFRNeB (ORCPT ); Mon, 18 Jun 2018 09:34:01 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A84BF60B24; Mon, 18 Jun 2018 13:34:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1529328840; bh=8ClMy/xcNhb2FqfnjV+HZqzoVb5jHjfTohxeIGhReOk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MVx4g2eJERnWq4v/AljMW9sI5odx5xa3IWmLqL93+bUKeoaCu/QVvOSJ67BZSH2Z1 7ZFEBF/YE+UnoXuqOSaau+EU0OtkPiWeHfGvKuv0Y0Tna5WxP/q4ph7foWV2Jytr/k 3P9rz+1TOy3DNvCEeznFpzkrLb4OyXuUojvK8ffE= Received: from skolluku-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: skolluku@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6B12360B3B; Mon, 18 Jun 2018 13:33:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1529328838; bh=8ClMy/xcNhb2FqfnjV+HZqzoVb5jHjfTohxeIGhReOk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GvwonZKB2ycevJkXIF0fazC/XokV7J6GiEg7umNI9Y7eNZNRQYjGu0zTgBs9xrvU1 EBVpCa00GhE3hXt3+VbyCdkoDHCzBdLhelflKwVbCDQWqZUV+sixjHzZM6Z8miQXWl tIeZxz1kcOWspyubVuBhcSc8r9Zlzejbj7XO+VPM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6B12360B3B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=skolluku@codeaurora.org From: Sravanthi Kollukuduru To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org Cc: Jeykumar Sankaran , robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org, Sravanthi Kollukuduru Subject: [DPU PATCH v2 09/14] drm/msm/dpu: move hw resource tracking to crtc state Date: Mon, 18 Jun 2018 19:02:47 +0530 Message-Id: <1529328772-5022-10-git-send-email-skolluku@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1529328772-5022-1-git-send-email-skolluku@codeaurora.org> References: <1529328772-5022-1-git-send-email-skolluku@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jeykumar Sankaran Prep changes for state based resource management. Moves all the hw block tracking for the crtc to the state object. changes in v2: - none Signed-off-by: Jeykumar Sankaran Signed-off-by: Sravanthi Kollukuduru --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 76 +++++++++++++++++--------------- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 26 +++++------ 2 files changed, 53 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 426e2ad..bed67cd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -142,9 +142,9 @@ static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc) crtc_state = to_dpu_crtc_state(crtc->state); lm_horiz_position = 0; - for (lm_idx = 0; lm_idx < dpu_crtc->num_mixers; lm_idx++) { + for (lm_idx = 0; lm_idx < crtc_state->num_mixers; lm_idx++) { const struct dpu_rect *lm_roi = &crtc_state->lm_bounds[lm_idx]; - struct dpu_hw_mixer *hw_lm = dpu_crtc->mixers[lm_idx].hw_lm; + struct dpu_hw_mixer *hw_lm = crtc_state->mixers[lm_idx].hw_lm; struct dpu_hw_mixer_cfg cfg; if (dpu_kms_rect_is_null(lm_roi)) @@ -237,7 +237,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, format->base.pixel_format, fb ? fb->modifier : 0); /* blend config update */ - for (lm_idx = 0; lm_idx < dpu_crtc->num_mixers; lm_idx++) { + for (lm_idx = 0; lm_idx < cstate->num_mixers; lm_idx++) { _dpu_crtc_setup_blend_cfg(mixer + lm_idx, pstate); mixer[lm_idx].flush_mask |= flush_mask; @@ -260,7 +260,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) { struct dpu_crtc *dpu_crtc; - struct dpu_crtc_state *dpu_crtc_state; + struct dpu_crtc_state *cstate; struct dpu_crtc_mixer *mixer; struct dpu_hw_ctl *ctl; struct dpu_hw_mixer *lm; @@ -271,17 +271,17 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) return; dpu_crtc = to_dpu_crtc(crtc); - dpu_crtc_state = to_dpu_crtc_state(crtc->state); - mixer = dpu_crtc->mixers; + cstate = to_dpu_crtc_state(crtc->state); + mixer = cstate->mixers; DPU_DEBUG("%s\n", dpu_crtc->name); - if (dpu_crtc->num_mixers > CRTC_DUAL_MIXERS) { - DPU_ERROR("invalid number mixers: %d\n", dpu_crtc->num_mixers); + if (cstate->num_mixers > CRTC_DUAL_MIXERS) { + DPU_ERROR("invalid number mixers: %d\n", cstate->num_mixers); return; } - for (i = 0; i < dpu_crtc->num_mixers; i++) { + for (i = 0; i < cstate->num_mixers; i++) { if (!mixer[i].hw_lm || !mixer[i].hw_ctl) { DPU_ERROR("invalid lm or ctl assigned to mixer\n"); return; @@ -298,7 +298,7 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) _dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer); - for (i = 0; i < dpu_crtc->num_mixers; i++) { + for (i = 0; i < cstate->num_mixers; i++) { ctl = mixer[i].hw_ctl; lm = mixer[i].hw_lm; @@ -583,7 +583,7 @@ static void _dpu_crtc_setup_mixer_for_encoder( struct drm_crtc *crtc, struct drm_encoder *enc) { - struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); + struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state); struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); struct dpu_rm *rm = &dpu_kms->rm; struct dpu_crtc_mixer *mixer; @@ -595,8 +595,8 @@ static void _dpu_crtc_setup_mixer_for_encoder( dpu_rm_init_hw_iter(&ctl_iter, enc->base.id, DPU_HW_BLK_CTL); /* Set up all the mixers and ctls reserved by this encoder */ - for (i = dpu_crtc->num_mixers; i < ARRAY_SIZE(dpu_crtc->mixers); i++) { - mixer = &dpu_crtc->mixers[i]; + for (i = cstate->num_mixers; i < ARRAY_SIZE(cstate->mixers); i++) { + mixer = &cstate->mixers[i]; if (!dpu_rm_get_hw(rm, &lm_iter)) break; @@ -621,7 +621,7 @@ static void _dpu_crtc_setup_mixer_for_encoder( mixer->encoder = enc; - dpu_crtc->num_mixers++; + cstate->num_mixers++; DPU_DEBUG("setup mixer %d: lm %d\n", i, mixer->hw_lm->idx - LM_0); DPU_DEBUG("setup mixer %d: ctl %d\n", @@ -632,11 +632,11 @@ static void _dpu_crtc_setup_mixer_for_encoder( static void _dpu_crtc_setup_mixers(struct drm_crtc *crtc) { struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); + struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state); struct drm_encoder *enc; - dpu_crtc->num_mixers = 0; - dpu_crtc->mixers_swapped = false; - memset(dpu_crtc->mixers, 0, sizeof(dpu_crtc->mixers)); + cstate->num_mixers = 0; + memset(cstate->mixers, 0, sizeof(cstate->mixers)); mutex_lock(&dpu_crtc->crtc_lock); /* Check for mixers on all encoders attached to this crtc */ @@ -670,7 +670,7 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, adj_mode = &state->adjusted_mode; crtc_split_width = dpu_crtc_get_mixer_width(dpu_crtc, cstate, adj_mode); - for (i = 0; i < dpu_crtc->num_mixers; i++) { + for (i = 0; i < cstate->num_mixers; i++) { cstate->lm_bounds[i].x = crtc_split_width * i; cstate->lm_bounds[i].y = 0; cstate->lm_bounds[i].w = crtc_split_width; @@ -688,6 +688,7 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { struct dpu_crtc *dpu_crtc; + struct dpu_crtc_state *cstate; struct drm_encoder *encoder; struct drm_device *dev; unsigned long flags; @@ -707,10 +708,11 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, DPU_DEBUG("crtc%d\n", crtc->base.id); dpu_crtc = to_dpu_crtc(crtc); + cstate = to_dpu_crtc_state(crtc->state); dev = crtc->dev; smmu_state = &dpu_crtc->smmu_state; - if (!dpu_crtc->num_mixers) { + if (!cstate->num_mixers) { _dpu_crtc_setup_mixers(crtc); _dpu_crtc_setup_lm_bounds(crtc, crtc->state); } @@ -737,7 +739,7 @@ static void dpu_crtc_atomic_begin(struct drm_crtc *crtc, * it means we are trying to flush a CRTC whose state is disabled: * nothing else needs to be done. */ - if (unlikely(!dpu_crtc->num_mixers)) + if (unlikely(!cstate->num_mixers)) return; _dpu_crtc_blend_setup(crtc); @@ -801,7 +803,7 @@ static void dpu_crtc_atomic_flush(struct drm_crtc *crtc, * it means we are trying to flush a CRTC whose state is disabled: * nothing else needs to be done. */ - if (unlikely(!dpu_crtc->num_mixers)) + if (unlikely(!cstate->num_mixers)) return; /* @@ -918,7 +920,7 @@ void dpu_crtc_commit_kickoff(struct drm_crtc *crtc) * it means we are trying to start a CRTC whose state is disabled: * nothing else needs to be done. */ - if (unlikely(!dpu_crtc->num_mixers)) + if (unlikely(!cstate->num_mixers)) return; DPU_ATRACE_BEGIN("crtc_commit"); @@ -1157,6 +1159,7 @@ static void dpu_crtc_handle_power_event(u32 event_type, void *arg) struct dpu_crtc *dpu_crtc; struct drm_encoder *encoder; struct dpu_crtc_mixer *m; + struct dpu_crtc_state *cstate; u32 i, misr_status; if (!crtc) { @@ -1179,8 +1182,8 @@ static void dpu_crtc_handle_power_event(u32 event_type, void *arg) dpu_encoder_virt_restore(encoder); } - for (i = 0; i < dpu_crtc->num_mixers; ++i) { - m = &dpu_crtc->mixers[i]; + for (i = 0; i < cstate->num_mixers; ++i) { + m = &cstate->mixers[i]; if (!m->hw_lm || !m->hw_lm->ops.setup_misr || !dpu_crtc->misr_enable) continue; @@ -1190,8 +1193,8 @@ static void dpu_crtc_handle_power_event(u32 event_type, void *arg) } break; case DPU_POWER_EVENT_PRE_DISABLE: - for (i = 0; i < dpu_crtc->num_mixers; ++i) { - m = &dpu_crtc->mixers[i]; + for (i = 0; i < cstate->num_mixers; ++i) { + m = &cstate->mixers[i]; if (!m->hw_lm || !m->hw_lm->ops.collect_misr || !dpu_crtc->misr_enable) continue; @@ -1287,9 +1290,8 @@ static void dpu_crtc_disable(struct drm_crtc *crtc) dpu_crtc->power_event); - memset(dpu_crtc->mixers, 0, sizeof(dpu_crtc->mixers)); - dpu_crtc->num_mixers = 0; - dpu_crtc->mixers_swapped = false; + memset(cstate->mixers, 0, sizeof(cstate->mixers)); + cstate->num_mixers = 0; /* disable clk & bw control until clk & bw properties are set */ cstate->bw_control = false; @@ -1654,8 +1656,8 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data) seq_puts(s, "\n"); - for (i = 0; i < dpu_crtc->num_mixers; ++i) { - m = &dpu_crtc->mixers[i]; + for (i = 0; i < cstate->num_mixers; ++i) { + m = &cstate->mixers[i]; if (!m->hw_lm) seq_printf(s, "\tmixer[%d] has no lm\n", i); else if (!m->hw_ctl) @@ -1748,6 +1750,7 @@ static ssize_t _dpu_crtc_misr_setup(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos) { struct dpu_crtc *dpu_crtc; + struct dpu_crtc_state *cstate; struct dpu_crtc_mixer *m; int i = 0, rc; char buf[MISR_BUFF_SIZE + 1]; @@ -1758,6 +1761,7 @@ static ssize_t _dpu_crtc_misr_setup(struct file *file, return -EINVAL; dpu_crtc = file->private_data; + cstate = to_dpu_crtc_state(dpu_crtc->base.state); buff_copy = min_t(size_t, count, MISR_BUFF_SIZE); if (copy_from_user(buf, user_buf, buff_copy)) { DPU_ERROR("buffer copy failed\n"); @@ -1776,9 +1780,9 @@ static ssize_t _dpu_crtc_misr_setup(struct file *file, mutex_lock(&dpu_crtc->crtc_lock); dpu_crtc->misr_enable = enable; dpu_crtc->misr_frame_count = frame_count; - for (i = 0; i < dpu_crtc->num_mixers; ++i) { + for (i = 0; i < cstate->num_mixers; ++i) { dpu_crtc->misr_data[i] = 0; - m = &dpu_crtc->mixers[i]; + m = &cstate->mixers[i]; if (!m->hw_lm || !m->hw_lm->ops.setup_misr) continue; @@ -1794,6 +1798,7 @@ static ssize_t _dpu_crtc_misr_read(struct file *file, char __user *user_buff, size_t count, loff_t *ppos) { struct dpu_crtc *dpu_crtc; + struct dpu_crtc_state *cstate; struct dpu_crtc_mixer *m; int i = 0, rc; u32 misr_status; @@ -1807,6 +1812,7 @@ static ssize_t _dpu_crtc_misr_read(struct file *file, return -EINVAL; dpu_crtc = file->private_data; + cstate = to_dpu_crtc_state(dpu_crtc->base.state); rc = _dpu_crtc_power_enable(dpu_crtc, true); if (rc) return rc; @@ -1818,8 +1824,8 @@ static ssize_t _dpu_crtc_misr_read(struct file *file, goto buff_check; } - for (i = 0; i < dpu_crtc->num_mixers; ++i) { - m = &dpu_crtc->mixers[i]; + for (i = 0; i < cstate->num_mixers; ++i) { + m = &cstate->mixers[i]; if (!m->hw_lm || !m->hw_lm->ops.collect_misr) continue; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 916615d..e7cc1ef 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h @@ -138,11 +138,6 @@ struct dpu_crtc_event { * struct dpu_crtc - virtualized CRTC data structure * @base : Base drm crtc structure * @name : ASCII description of this crtc - * @num_ctls : Number of ctl paths in use - * @num_mixers : Number of mixers in use - * @mixers_swapped: Whether the mixers have been swapped for left/right update - * especially in the case of DSC Merge. - * @mixers : List of active mixers * @event : Pointer to last received drm vblank event. If there is a * pending vblank event, this will be non-null. * @vsync_count : Running count of received vsync events @@ -186,12 +181,6 @@ struct dpu_crtc { struct drm_crtc base; char name[DPU_CRTC_NAME_SIZE]; - /* HW Resources reserved for the crtc */ - u32 num_ctls; - u32 num_mixers; - bool mixers_swapped; - struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; - struct drm_pending_vblank_event *event; u32 vsync_count; @@ -250,6 +239,10 @@ struct dpu_crtc { * @property_values: Current crtc property values * @input_fence_timeout_ns : Cached input fence timeout, in ns * @new_perf: new performance state being requested + * @num_mixers : Number of mixers in use + * @mixers : List of active mixers + * @num_ctls : Number of ctl paths in use + * @hw_ctls : List of activel ctl paths */ struct dpu_crtc_state { struct drm_crtc_state base; @@ -258,12 +251,17 @@ struct dpu_crtc_state { int num_connectors; bool bw_control; bool bw_split_vote; - struct dpu_rect lm_bounds[CRTC_DUAL_MIXERS]; uint64_t input_fence_timeout_ns; - struct dpu_core_perf_params new_perf; + + /* HW Resources reserved for the crtc */ + u32 num_mixers; + struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS]; + + u32 num_ctls; + struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS]; }; #define to_dpu_crtc_state(x) \ @@ -281,7 +279,7 @@ static inline int dpu_crtc_get_mixer_width(struct dpu_crtc *dpu_crtc, if (!dpu_crtc || !cstate || !mode) return 0; - mixer_width = (dpu_crtc->num_mixers == CRTC_DUAL_MIXERS ? + mixer_width = (cstate->num_mixers == CRTC_DUAL_MIXERS ? mode->hdisplay / CRTC_DUAL_MIXERS : mode->hdisplay); return mixer_width;