From patchwork Mon Jun 18 13:32:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sravanthi Kollukuduru X-Patchwork-Id: 10471469 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AA99F6029B for ; Mon, 18 Jun 2018 13:34:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99AA8289E4 for ; Mon, 18 Jun 2018 13:34:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E191289E8; Mon, 18 Jun 2018 13:34:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1FA77289E4 for ; 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Mon, 18 Jun 2018 13:34:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1529328851; bh=Ybg+Yds/b0D1gSVoskn0Sa0JXNRKQjBS3oM10YhtY3E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eukFie+4KYtRaLFyhE8hiGnBirxjSZKord1zOTg4ub+k6Pdgfgh09CI0IYA56FqoY M+rx3eWU+JyjvZbHZAFthl7Ie5wU9U8YViXKFlmwb44Jiyo3oBvHp/YbrrnHHRspVY 54M4lPikOEHzSii/ie0sN+h5w5zcUZiwIuXQ2A6g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2613F60B13 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=skolluku@codeaurora.org From: Sravanthi Kollukuduru To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org Cc: Jeykumar Sankaran , robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org, Sravanthi Kollukuduru Subject: [DPU PATCH v2 12/14] drm/msm/dpu: remove display H_TILE from encoder Date: Mon, 18 Jun 2018 19:02:50 +0530 Message-Id: <1529328772-5022-13-git-send-email-skolluku@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1529328772-5022-1-git-send-email-skolluku@codeaurora.org> References: <1529328772-5022-1-git-send-email-skolluku@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jeykumar Sankaran Encoder H_TILE values are not used for allocating the hw blocks. no. of hw_intf blocks provides the info. changes in v2: - none Signed-off-by: Jeykumar Sankaran Signed-off-by: Sravanthi Kollukuduru --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 ----- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 4 ---- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 3 +-- 3 files changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index c9e2dce..5e820bc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -179,8 +179,6 @@ struct dpu_encoder_virt { spinlock_t enc_spinlock; uint32_t bus_scaling_client; - uint32_t display_num_of_h_tiles; - unsigned int num_phys_encs; struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL]; struct dpu_encoder_phys *cur_master; @@ -469,7 +467,6 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, /* Query resources used by phys encs, expected to be without overlap */ memset(hw_res, 0, sizeof(*hw_res)); - hw_res->display_num_of_h_tiles = dpu_enc->display_num_of_h_tiles; for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; @@ -2295,8 +2292,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, WARN_ON(disp_info->num_of_h_tiles < 1); - dpu_enc->display_num_of_h_tiles = disp_info->num_of_h_tiles; - DPU_DEBUG("dsi_info->num_of_h_tiles %d\n", disp_info->num_of_h_tiles); if ((disp_info->capabilities & MSM_DISPLAY_CAP_CMD_MODE) || diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index ce92901..a9f49b2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -33,14 +33,10 @@ * Encoder functions and data types * @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused * @needs_cdm: Encoder requests a CDM based on pixel format conversion needs - * @display_num_of_h_tiles: Number of horizontal tiles in case of split - * interface - * @topology: Topology of the display */ struct dpu_encoder_hw_resources { enum dpu_intf_mode intfs[INTF_MAX]; bool needs_cdm; - u32 display_num_of_h_tiles; }; /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index b65f386..ef945d6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -818,8 +818,7 @@ static int _dpu_rm_populate_requirements( conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) reqs->top_ctrl |= BIT(DPU_RM_TOPCTL_DS); - DPU_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl, - reqs->hw_res.display_num_of_h_tiles); + DPU_DEBUG("top_ctrl: 0x%llX\n", reqs->top_ctrl); DPU_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n", reqs->topology->num_lm, reqs->topology->num_ctl, reqs->topology->top_name,