diff mbox series

[v1,2/3] dt-bindings: i3c: Document Qualcomm GENI I3C master bindings

Message ID 1533101942-29442-3-git-send-email-mshettel@codeaurora.org (mailing list archive)
State Not Applicable, archived
Delegated to: Andy Gross
Headers show
Series Add a driver for Qualcomm GENI I3C master IP | expand

Commit Message

Mike Shettel Aug. 1, 2018, 5:39 a.m. UTC
Signed-off-by: Mike Shettel <mshettel@codeaurora.org>
---
 .../devicetree/bindings/i3c/qcom,geni-i3c.txt      | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt

Comments

Stephen Boyd Aug. 9, 2018, 3:06 p.m. UTC | #1
Quoting Mike Shettel (2018-07-31 22:39:01)
> Signed-off-by: Mike Shettel <mshettel@codeaurora.org>

You need to write some commit text here. Otherwise we don't know why we
want to even look at the patch.

> diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
> new file mode 100644
> index 0000000..8b76fda
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
> @@ -0,0 +1,44 @@
[...]
> +
> +I3C device connected on the bus follow the generic description (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details).
> +
> +Example:
> +
> +       i3c-master@0d040000 {

Drop leading 0 on unit addresses.

--
To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Rob Herring Aug. 13, 2018, 9:47 p.m. UTC | #2
On Tue, Jul 31, 2018 at 11:39:01PM -0600, Mike Shettel wrote:
> Signed-off-by: Mike Shettel <mshettel@codeaurora.org>
> ---
>  .../devicetree/bindings/i3c/qcom,geni-i3c.txt      | 44 ++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
> 
> diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
> new file mode 100644
> index 0000000..8b76fda
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
> @@ -0,0 +1,44 @@
> +Bindings for Qualcomm Geni I3C master block
> +===========================================
> +
> +Required properties:
> +--------------------
> +- compatible: shall be "qcom,geni-i3c"
> +- clocks: shall reference the se clock
> +- clock-names: shall contain clock name corresponding to the serial engine

What's the name?

> +- interrupts: the interrupt line connected to this I3C master
> +- reg: I3C master registers
> +
> +Optional properties:
> +--------------------
> +- se-clock-frequency: Source serial clock frequency to use

You should be able to figure out this frequency based on available 
dividers and the specified bus frequencies.

Or use assigned-clocks.

> +- dfs-index: Dynamic frequency scaling table index to use

Needs a vendor prefix.

> +
> +Mandatory properties defined by the generic binding (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
> +
> +- #address-cells: shall be set to 3
> +- #size-cells: shall be set to 0
> +
> +Optional properties defined by the generic binding (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
> +
> +- i2c-scl-hz
> +- i3c-scl-hz
 +
> +I3C device connected on the bus follow the generic description (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details).
> +
> +Example:
> +
> +	i3c-master@0d040000 {
> +		compatible = "qcom,geni-i3c";
> +		clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
> +		clock-names = "se";
> +		interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> +		reg = <0x0d040000 0x4000>;
> +		#address-cells = <3>;
> +		#size-cells = <0>;
> +		i2c-scl-hz = <100000>;
> +	};
> +
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
new file mode 100644
index 0000000..8b76fda
--- /dev/null
+++ b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
@@ -0,0 +1,44 @@ 
+Bindings for Qualcomm Geni I3C master block
+===========================================
+
+Required properties:
+--------------------
+- compatible: shall be "qcom,geni-i3c"
+- clocks: shall reference the se clock
+- clock-names: shall contain clock name corresponding to the serial engine
+- interrupts: the interrupt line connected to this I3C master
+- reg: I3C master registers
+
+Optional properties:
+--------------------
+- se-clock-frequency: Source serial clock frequency to use
+- dfs-index: Dynamic frequency scaling table index to use
+
+Mandatory properties defined by the generic binding (see
+Documentation/devicetree/bindings/i3c/i3c.txt for more details):
+
+- #address-cells: shall be set to 3
+- #size-cells: shall be set to 0
+
+Optional properties defined by the generic binding (see
+Documentation/devicetree/bindings/i3c/i3c.txt for more details):
+
+- i2c-scl-hz
+- i3c-scl-hz
+
+I3C device connected on the bus follow the generic description (see
+Documentation/devicetree/bindings/i3c/i3c.txt for more details).
+
+Example:
+
+	i3c-master@0d040000 {
+		compatible = "qcom,geni-i3c";
+		clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
+		clock-names = "se";
+		interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x0d040000 0x4000>;
+		#address-cells = <3>;
+		#size-cells = <0>;
+		i2c-scl-hz = <100000>;
+	};
+