From patchwork Sat Sep 8 00:24:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10592777 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 611C41669 for ; Sat, 8 Sep 2018 00:25:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 446122B627 for ; Sat, 8 Sep 2018 00:25:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 38AB32B646; Sat, 8 Sep 2018 00:25:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B25532B627 for ; Sat, 8 Sep 2018 00:25:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726307AbeIHFIr (ORCPT ); Sat, 8 Sep 2018 01:08:47 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:41514 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726378AbeIHFIr (ORCPT ); Sat, 8 Sep 2018 01:08:47 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A1C7160BDD; Sat, 8 Sep 2018 00:24:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1536366318; bh=5bP5j4f8xEnu5IdmA5e8Dv4xpsXcw8pCwKdkXksy+H8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yq51Cp9ylV1fMlXaA/X+lV25PLIlzaJoF/c9/8UDyADPMCLKo7TGu6Knn3iMPuGbY RCpE+P9R6feummhjCCnFRpaMw67W9d3R+wN24W4WpuxlYymtHu6bKRZxAAkhDzhDSG g9tNeTV74vyAomysSa2XCoAa4E12BPrfukxQyFPA= Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C3F4660B74; Sat, 8 Sep 2018 00:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1536366290; bh=5bP5j4f8xEnu5IdmA5e8Dv4xpsXcw8pCwKdkXksy+H8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Kufx6LrPnEgt8aHV8dm2I6v5Y+wt5dZN3LJt6zKJZAlinlWDfUeAnonRTbHCTmfam jA3QX0jWM9uSdpBB+Jz7kzI5MqRwrnj5BSzuu79C+yq17gRdgQhGPsWh14EerSmpxd T3Hy1v+0rPqdnKtQtnt/VrCp2P0THt1qpedVjypE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C3F4660B74 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jsanka@codeaurora.org From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: Jeykumar Sankaran , seanpaul@chromium.org, robdclark@gmail.com, hoegsberg@google.com, jcrouse@codeaurora.org Subject: [PATCH v6 15/19] drm/msm/dpu: remove LOCK/CLEAR support in RM Date: Fri, 7 Sep 2018 17:24:23 -0700 Message-Id: <1536366267-22336-16-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1536366267-22336-1-git-send-email-jsanka@codeaurora.org> References: <1536366267-22336-1-git-send-email-jsanka@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP DPU had the support to LOCK the hw resources in atomic check and CLEAR the locked resources explicitly through custom property values. Now that DPU is stripped off of all the custom properties, the RM handlers for this feature will be no-op's. This change gets rid of all its references. changes in v5: - Introduced in the series. changes in v6: - none Signed-off-by: Jeykumar Sankaran Reviewed-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 25 ++----------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 16 ---------------- 2 files changed, 2 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index e2e64fe..42751ba 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -24,8 +24,6 @@ #define RESERVED_BY_OTHER(h, r) \ ((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) -#define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(DPU_RM_TOPCTL_RESERVE_LOCK)) -#define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(DPU_RM_TOPCTL_RESERVE_CLEAR)) #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \ (t).num_comp_enc == (r).num_enc && \ (t).num_intf == (r).num_intf) @@ -48,12 +46,10 @@ struct dpu_rm_topology_def { /** * struct dpu_rm_requirements - Reservation requirements parameter bundle - * @top_ctrl: topology control preference from kernel client * @top: selected topology for the display * @hw_res: Hardware resources required as reported by the encoders */ struct dpu_rm_requirements { - uint64_t top_ctrl; const struct dpu_rm_topology_def *topology; struct dpu_encoder_hw_resources hw_res; }; @@ -755,8 +751,7 @@ static int _dpu_rm_populate_requirements( return -EINVAL; } - DRM_DEBUG_KMS("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl, - reqs->hw_res.display_num_of_h_tiles); + DRM_DEBUG_KMS("num_h_tiles: %d\n", reqs->hw_res.display_num_of_h_tiles); DRM_DEBUG_KMS("num_lm: %d num_ctl: %d topology: %d split_display: %d\n", reqs->topology->num_lm, reqs->topology->num_ctl, reqs->topology->top_name, @@ -956,18 +951,6 @@ int dpu_rm_reserve( rsvp_cur = _dpu_rm_get_rsvp(rm, enc); - /* - * User can request that we clear out any reservation during the - * atomic_check phase by using this CLEAR bit - */ - if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) { - DPU_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n", - rsvp_cur->seq, rsvp_cur->enc_id); - _dpu_rm_release_rsvp(rm, rsvp_cur, conn_state->connector); - rsvp_cur = NULL; - _dpu_rm_print_rsvps(rm, DPU_RM_STAGE_AFTER_CLEAR); - } - /* Check the proposed reservation, store it in hw's "next" field */ ret = _dpu_rm_make_next_rsvp(rm, enc, crtc_state, conn_state, rsvp_nxt, &reqs); @@ -977,7 +960,7 @@ int dpu_rm_reserve( if (ret) { DPU_ERROR("failed to reserve hw resources: %d\n", ret); _dpu_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector); - } else if (test_only && !RM_RQ_LOCK(&reqs)) { + } else if (test_only) { /* * Normally, if test_only, test the reservation and then undo * However, if the user requests LOCK, then keep the reservation @@ -987,10 +970,6 @@ int dpu_rm_reserve( rsvp_nxt->seq, rsvp_nxt->enc_id); _dpu_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector); } else { - if (test_only && RM_RQ_LOCK(&reqs)) - DPU_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n", - rsvp_nxt->seq, rsvp_nxt->enc_id); - _dpu_rm_release_rsvp(rm, rsvp_cur, conn_state->connector); ret = _dpu_rm_commit_rsvp(rm, rsvp_nxt, conn_state); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 89355d0..3a6a5546 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -36,22 +36,6 @@ enum dpu_rm_topology_name { }; /** - * enum dpu_rm_topology_control - HW resource use case in use by connector - * @DPU_RM_TOPCTL_RESERVE_LOCK: If set, in AtomicTest phase, after a successful - * test, reserve the resources for this display. - * Normal behavior would not impact the reservation - * list during the AtomicTest phase. - * @DPU_RM_TOPCTL_RESERVE_CLEAR: If set, in AtomicTest phase, before testing, - * release any reservation held by this display. - * Normal behavior would not impact the - * reservation list during the AtomicTest phase. - */ -enum dpu_rm_topology_control { - DPU_RM_TOPCTL_RESERVE_LOCK, - DPU_RM_TOPCTL_RESERVE_CLEAR, -}; - -/** * struct dpu_rm - DPU dynamic hardware resource manager * @dev: device handle for event logging purposes * @rsvps: list of hardware reservations by each crtc->encoder->connector