From patchwork Wed Oct 17 13:04:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sharat Masetty X-Patchwork-Id: 10645543 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C26E7181D for ; Wed, 17 Oct 2018 13:04:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B72CF2851D for ; Wed, 17 Oct 2018 13:04:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB4482AEF4; Wed, 17 Oct 2018 13:04:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 392252AF4C for ; Wed, 17 Oct 2018 13:04:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727249AbeJQU7x (ORCPT ); Wed, 17 Oct 2018 16:59:53 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:55906 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727000AbeJQU7x (ORCPT ); Wed, 17 Oct 2018 16:59:53 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7CE0161317; Wed, 17 Oct 2018 13:04:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539781455; bh=1lt5ZGzYnL2Ez2ht12i5iEQ9FMebXvbL69R5jHzaUKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BoGrHqd1++zfi8VW7eh2DBko/kF7asqGIHDhf8oIxKqhjGnSIJVkq3C9M3hhXZKsx Jo0UhB80yzIPGqEI9FeLfePojouJENcnGGo8XU1YeUF9z0MQveHR1v9556wP2/xajR vNePVjyMErHUufr55SOP3XXGk7azPr8TNWQ4hSWs= Received: from smasetty-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: smasetty@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 2A10961324; Wed, 17 Oct 2018 13:04:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539781455; bh=1lt5ZGzYnL2Ez2ht12i5iEQ9FMebXvbL69R5jHzaUKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BoGrHqd1++zfi8VW7eh2DBko/kF7asqGIHDhf8oIxKqhjGnSIJVkq3C9M3hhXZKsx Jo0UhB80yzIPGqEI9FeLfePojouJENcnGGo8XU1YeUF9z0MQveHR1v9556wP2/xajR vNePVjyMErHUufr55SOP3XXGk7azPr8TNWQ4hSWs= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 2A10961324 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=smasetty@codeaurora.org From: Sharat Masetty To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, jcrouse@codeaurora.org, Sharat Masetty Subject: [PATCH 2/3] drm/msm/a6xx: Move power counter selectable to resume() Date: Wed, 17 Oct 2018 18:34:00 +0530 Message-Id: <1539781441-13076-3-git-send-email-smasetty@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539781441-13076-1-git-send-email-smasetty@codeaurora.org> References: <1539781441-13076-1-git-send-email-smasetty@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Moving this to resume helps with both GPU DCVS and the performance sampling. For GPU DCVS this makes sure that the frequency does not scale when there are no GPU submissions. In the case of performance profiling, the GPU is UP, but its possible that the hw_init() was not called yet, so we need this to get sane perf values in all cases. Signed-off-by: Sharat Masetty --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index c0cd3ac..2c52b7c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -387,14 +387,6 @@ static int a6xx_hw_init(struct msm_gpu *gpu) /* Select CP0 to always count cycles */ gpu_write(gpu, REG_A6XX_CP_PERFCTR_CP_SEL_0, PERF_CP_ALWAYS_COUNT); - /* FIXME: not sure if this should live here or in a6xx_gmu.c */ - gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, - 0xff000000); - gmu_rmw(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_SELECT_0, - 0xff, 0x20); - gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, - 0x01); - gpu_write(gpu, REG_A6XX_RB_NC_MODE_CNTL, 2 << 1); gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, 2 << 1); gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL, 2 << 1); @@ -655,6 +647,14 @@ static int a6xx_pm_resume(struct msm_gpu *gpu) gpu->needs_hw_init = true; + /* FIXME: not sure if this should live here or in a6xx_gmu.c */ + gmu_write(&a6xx_gpu->gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MASK, + 0xff000000); + gmu_rmw(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_SELECT_0, + 0xff, 0x20); + gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, + 0x01); + msm_gpu_resume_devfreq(gpu); return ret;