| Message ID | 1542713851-14375-3-git-send-email-smasetty@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [1/4] drm/msm: use kvmalloc for ring data in gpu crashstate | expand |
On Tue, Nov 20, 2018 at 05:07:30PM +0530, Sharat Masetty wrote: > The ring substructure in msm_gpu_state is an extension of > msm_gpu_state_bo, so this patch changes the ring structure > to reuse the msm_gpu_state_bo as a base class, instead of > redefining the required variables. > > Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Looks okay. There might be some code consolidation to be had here but perhaps you've already addressed this in a future patch or we can do it as a rainy day cleanup. Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> > --- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 20 +++++++++++--------- > drivers/gpu/drm/msm/msm_gpu.h | 4 +--- > 2 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index 6ebe842..bbf8d3e 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -383,7 +383,7 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) > int size = 0, j; > > state->ring[i].fence = gpu->rb[i]->memptrs->fence; > - state->ring[i].iova = gpu->rb[i]->iova; > + state->ring[i].bo.iova = gpu->rb[i]->iova; > state->ring[i].seqno = gpu->rb[i]->seqno; > state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]); > state->ring[i].wptr = get_wptr(gpu->rb[i]); > @@ -397,10 +397,12 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) > size = j + 1; > > if (size) { > - state->ring[i].data = kvmalloc(size << 2, GFP_KERNEL); > - if (state->ring[i].data) { > - memcpy(state->ring[i].data, gpu->rb[i]->start, size << 2); > - state->ring[i].data_size = size << 2; > + state->ring[i].bo.data = > + kvmalloc(size << 2, GFP_KERNEL); > + if (state->ring[i].bo.data) { > + memcpy(state->ring[i].bo.data, > + gpu->rb[i]->start, size << 2); > + state->ring[i].bo.size = size << 2; Today I learned there that kvmemdup() does not exist and I was sad about it. > } > } > } > @@ -440,7 +442,7 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state) > int i; > > for (i = 0; i < ARRAY_SIZE(state->ring); i++) > - kvfree(state->ring[i].data); > + kvfree(state->ring[i].bo.data); > > for (i = 0; state->bos && i < state->nr_bos; i++) > kvfree(state->bos[i].data); > @@ -522,15 +524,15 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, > > for (i = 0; i < gpu->nr_rings; i++) { > drm_printf(p, " - id: %d\n", i); > - drm_printf(p, " iova: 0x%016llx\n", state->ring[i].iova); > + drm_printf(p, " iova: 0x%016llx\n", state->ring[i].bo.iova); > drm_printf(p, " last-fence: %d\n", state->ring[i].seqno); > drm_printf(p, " retired-fence: %d\n", state->ring[i].fence); > drm_printf(p, " rptr: %d\n", state->ring[i].rptr); > drm_printf(p, " wptr: %d\n", state->ring[i].wptr); > drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); > > - adreno_show_object(p, state->ring[i].data, > - state->ring[i].data_size); > + adreno_show_object(p, state->ring[i].bo.data, > + state->ring[i].bo.size); > } > > if (state->bos) { > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index 7dc775f..a3a6371 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -198,13 +198,11 @@ struct msm_gpu_state { > struct timeval time; > > struct { > - u64 iova; > u32 fence; > u32 seqno; > u32 rptr; > u32 wptr; > - void *data; > - int data_size; > + struct msm_gpu_state_bo bo; > } ring[MSM_GPU_MAX_RINGS]; > > int nr_registers; > -- > 1.9.1 >
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 6ebe842..bbf8d3e 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -383,7 +383,7 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) int size = 0, j; state->ring[i].fence = gpu->rb[i]->memptrs->fence; - state->ring[i].iova = gpu->rb[i]->iova; + state->ring[i].bo.iova = gpu->rb[i]->iova; state->ring[i].seqno = gpu->rb[i]->seqno; state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]); state->ring[i].wptr = get_wptr(gpu->rb[i]); @@ -397,10 +397,12 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) size = j + 1; if (size) { - state->ring[i].data = kvmalloc(size << 2, GFP_KERNEL); - if (state->ring[i].data) { - memcpy(state->ring[i].data, gpu->rb[i]->start, size << 2); - state->ring[i].data_size = size << 2; + state->ring[i].bo.data = + kvmalloc(size << 2, GFP_KERNEL); + if (state->ring[i].bo.data) { + memcpy(state->ring[i].bo.data, + gpu->rb[i]->start, size << 2); + state->ring[i].bo.size = size << 2; } } } @@ -440,7 +442,7 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state) int i; for (i = 0; i < ARRAY_SIZE(state->ring); i++) - kvfree(state->ring[i].data); + kvfree(state->ring[i].bo.data); for (i = 0; state->bos && i < state->nr_bos; i++) kvfree(state->bos[i].data); @@ -522,15 +524,15 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, for (i = 0; i < gpu->nr_rings; i++) { drm_printf(p, " - id: %d\n", i); - drm_printf(p, " iova: 0x%016llx\n", state->ring[i].iova); + drm_printf(p, " iova: 0x%016llx\n", state->ring[i].bo.iova); drm_printf(p, " last-fence: %d\n", state->ring[i].seqno); drm_printf(p, " retired-fence: %d\n", state->ring[i].fence); drm_printf(p, " rptr: %d\n", state->ring[i].rptr); drm_printf(p, " wptr: %d\n", state->ring[i].wptr); drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); - adreno_show_object(p, state->ring[i].data, - state->ring[i].data_size); + adreno_show_object(p, state->ring[i].bo.data, + state->ring[i].bo.size); } if (state->bos) { diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 7dc775f..a3a6371 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -198,13 +198,11 @@ struct msm_gpu_state { struct timeval time; struct { - u64 iova; u32 fence; u32 seqno; u32 rptr; u32 wptr; - void *data; - int data_size; + struct msm_gpu_state_bo bo; } ring[MSM_GPU_MAX_RINGS]; int nr_registers;
The ring substructure in msm_gpu_state is an extension of msm_gpu_state_bo, so this patch changes the ring structure to reuse the msm_gpu_state_bo as a base class, instead of redefining the required variables. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 20 +++++++++++--------- drivers/gpu/drm/msm/msm_gpu.h | 4 +--- 2 files changed, 12 insertions(+), 12 deletions(-)