| Message ID | 1551469117-3404-5-git-send-email-jcrouse@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | drm/msm: Per-instance pagetable support | expand |
On Fri, Mar 01, 2019 at 12:38:26PM -0700, Jordan Crouse wrote: > Add an attribute to return the base address of the pagetable. This is used > by auxiliary domains from arm-smmu to return the address of the pagetable > to the leaf driver so that it can set the appropriate pagetable through > it's own means. What is this going to be used for? Page-table management is supposed to happen in the arm-smmu driver and the gpu driver only makes changes through iommu_map/iommu_unmap calls. Regards, Joerg
On Mon, Mar 18, 2019 at 10:53:21AM +0100, Joerg Roedel wrote: > On Fri, Mar 01, 2019 at 12:38:26PM -0700, Jordan Crouse wrote: > > Add an attribute to return the base address of the pagetable. This is used > > by auxiliary domains from arm-smmu to return the address of the pagetable > > to the leaf driver so that it can set the appropriate pagetable through > > it's own means. > > What is this going to be used for? Page-table management is supposed to > happen in the arm-smmu driver and the gpu driver only makes changes > through iommu_map/iommu_unmap calls. Adreno GPUs can an internal mechanism to switch the pagetable address in the attached arm-smmu v2 IOMMU so that each individual rendering process can have their own pagetable. The driver uses iommu_map and iommu_unmap to write the pagetable but the address for each individual pagetable needs to be queried so it can be sent to the hardware. You can see the driver specific code that does this here: https://patchwork.freedesktop.org/patch/289507/?series=57441&rev=1 Jordan
Hi Jordan, On Mon, Mar 18, 2019 at 08:19:12AM -0600, Jordan Crouse wrote: > Adreno GPUs can an internal mechanism to switch the pagetable address in the > attached arm-smmu v2 IOMMU so that each individual rendering process can have > their own pagetable. The driver uses iommu_map and iommu_unmap to write > the pagetable but the address for each individual pagetable needs to be queried > so it can be sent to the hardware. You can see the driver specific code that > does this here: Okay, thanks for the explanation. I still don't like it, but it is probably better putting gpu-specfic context-switch logic into the iommu driver, so I guess this is okay. Regards, Joerg
diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 3f2250b..dc60a71 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -126,6 +126,7 @@ enum iommu_attr { DOMAIN_ATTR_NESTING, /* two stages of translation */ DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE, DOMAIN_ATTR_SPLIT_TABLES, + DOMAIN_ATTR_PTBASE, DOMAIN_ATTR_MAX, };
Add an attribute to return the base address of the pagetable. This is used by auxiliary domains from arm-smmu to return the address of the pagetable to the leaf driver so that it can set the appropriate pagetable through it's own means. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> --- include/linux/iommu.h | 1 + 1 file changed, 1 insertion(+)