| Message ID | 1575543357-31892-1-git-send-email-gkohli@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v0] irqchip/gic-v3: Avoid check of lpi configuration for non existent cpu | expand |
Hi Gaurav, On 2019-12-05 10:55, Gaurav Kohli wrote: > As per GIC specification, we can configure gic for more no of cpus > then the available cpus in the soc, But this can cause mem abort > while iterating lpi region for non existent cpu as we don't map Which LPI region? We're talking about RDs, right... Or does LPI mean something other than GIC LPIs for you? > redistrubutor region for non-existent cpu. > > To avoid this issue, put one more check of valid mpidr. Sorry, but I'm not sure I grasp your problem. Let me try and rephrase it: - Your GIC is configured for (let's say) 8 CPUs, and your SoC has only 4. - As part of the probing, the driver iterates on the RD regions and explodes because something isn't mapped? That'd be a grave bug, but I believe the issue is somewhere else. > > Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org> > > diff --git a/drivers/irqchip/irq-gic-v3.c > b/drivers/irqchip/irq-gic-v3.c > index 1edc993..adc9186 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -766,6 +766,7 @@ static int gic_iterate_rdists(int (*fn)(struct > redist_region *, void __iomem *)) > { > int ret = -ENODEV; > int i; > + int cpu = 0; > > for (i = 0; i < gic_data.nr_redist_regions; i++) { > void __iomem *ptr = gic_data.redist_regions[i].redist_base; > @@ -780,6 +781,7 @@ static int gic_iterate_rdists(int (*fn)(struct > redist_region *, void __iomem *)) > } > > do { > + cpu++; > typer = gic_read_typer(ptr + GICR_TYPER); > ret = fn(gic_data.redist_regions + i, ptr); > if (!ret) > @@ -795,7 +797,8 @@ static int gic_iterate_rdists(int (*fn)(struct > redist_region *, void __iomem *)) > if (typer & GICR_TYPER_VLPIS) > ptr += SZ_64K * 2; /* Skip VLPI_base + reserved page */ > } > - } while (!(typer & GICR_TYPER_LAST)); > + } while (!(typer & GICR_TYPER_LAST) && > + cpu_logical_map(cpu) != INVALID_HWID); > } > > return ret ? -ENODEV : 0; This makes little sense. A redistributor region contains a bunch of RDs, each of which maps onto a given CPU. We iterate on the RDs, and not on the CPUs, as it is the RD that tells us which CPU it is affine with, not the other way around. If a RD is for some reason unavailable, then it shouldn't be described in the firmware the first place. If you end-up exposing RD regions that do not have the last RD having GICR_TYPER.Last set, then your SoC is broken, and this needs yet another quirk. M.
On 12/5/2019 6:17 PM, Marc Zyngier wrote: > Hi Gaurav, > > On 2019-12-05 10:55, Gaurav Kohli wrote: >> As per GIC specification, we can configure gic for more no of cpus >> then the available cpus in the soc, But this can cause mem abort >> while iterating lpi region for non existent cpu as we don't map > > Which LPI region? We're talking about RDs, right... Or does LPI mean > something other than GIC LPIs for you? > Yes RDs only. >> redistrubutor region for non-existent cpu. >> >> To avoid this issue, put one more check of valid mpidr. > > Sorry, but I'm not sure I grasp your problem. Let me try and rephrase it: > > - Your GIC is configured for (let's say) 8 CPUs, and your SoC has only 4. Yes, suppose gic is configured for 8 cpus but soc has only 4 cpus. Then in this case gic_iterate will iterate till it get TYPER_LAST. But as gic is configured for 8, So last bit sets in eight redistributor regions only. > > - As part of the probing, the driver iterates on the RD regions and > explodes > because something isn't mapped? > > That'd be a grave bug, but I believe the issue is somewhere else. There are 4 cpus present, that's why we have mapped 4 redistributor only, but during probe below function keeps iterating and give mem abort for 5th cpu. static void gic_update_vlpi_properties(void) { gic_iterate_rdists(__gic_update_vlpi_properties); } We can solve this problem by mapping all eight redistributor in dt, but ideally code should also able to handle this and we can avoid mappin? > >> >> Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org> >> >> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c >> index 1edc993..adc9186 100644 >> --- a/drivers/irqchip/irq-gic-v3.c >> +++ b/drivers/irqchip/irq-gic-v3.c >> @@ -766,6 +766,7 @@ static int gic_iterate_rdists(int (*fn)(struct >> redist_region *, void __iomem *)) >> { >> int ret = -ENODEV; >> int i; >> + int cpu = 0; >> >> for (i = 0; i < gic_data.nr_redist_regions; i++) { >> void __iomem *ptr = gic_data.redist_regions[i].redist_base; >> @@ -780,6 +781,7 @@ static int gic_iterate_rdists(int (*fn)(struct >> redist_region *, void __iomem *)) >> } >> >> do { >> + cpu++; >> typer = gic_read_typer(ptr + GICR_TYPER); >> ret = fn(gic_data.redist_regions + i, ptr); >> if (!ret) >> @@ -795,7 +797,8 @@ static int gic_iterate_rdists(int (*fn)(struct >> redist_region *, void __iomem *)) >> if (typer & GICR_TYPER_VLPIS) >> ptr += SZ_64K * 2; /* Skip VLPI_base + reserved >> page */ >> } >> - } while (!(typer & GICR_TYPER_LAST)); >> + } while (!(typer & GICR_TYPER_LAST) && >> + cpu_logical_map(cpu) != INVALID_HWID); >> } >> >> return ret ? -ENODEV : 0; > > This makes little sense. A redistributor region contains a bunch of RDs, > each of which maps onto a given CPU. We iterate on the RDs, and not on the > CPUs, as it is the RD that tells us which CPU it is affine with, not the > other way around. > > If a RD is for some reason unavailable, then it shouldn't be described in > the firmware the first place. If you end-up exposing RD regions that do > not have the last RD having GICR_TYPER.Last set, then your SoC is broken, > and this needs yet another quirk. > > M.
On 2019-12-05 13:01, Gaurav Kohli wrote: > On 12/5/2019 6:17 PM, Marc Zyngier wrote: >> Hi Gaurav, >> On 2019-12-05 10:55, Gaurav Kohli wrote: >>> As per GIC specification, we can configure gic for more no of cpus >>> then the available cpus in the soc, But this can cause mem abort >>> while iterating lpi region for non existent cpu as we don't map >> Which LPI region? We're talking about RDs, right... Or does LPI mean >> something other than GIC LPIs for you? >> > > Yes RDs only. >>> redistrubutor region for non-existent cpu. >>> >>> To avoid this issue, put one more check of valid mpidr. >> Sorry, but I'm not sure I grasp your problem. Let me try and >> rephrase it: >> - Your GIC is configured for (let's say) 8 CPUs, and your SoC has >> only 4. > Yes, suppose gic is configured for 8 cpus but soc has only 4 cpus. > Then in this case gic_iterate will iterate till it get TYPER_LAST. And that's what is expected from the architecture. > > But as gic is configured for 8, So last bit sets in eight > redistributor regions only. >> - As part of the probing, the driver iterates on the RD regions and >> explodes >> because something isn't mapped? >> That'd be a grave bug, but I believe the issue is somewhere else. > > There are 4 cpus present, that's why we have mapped 4 redistributor > only, but during probe below function keeps iterating and give mem > abort for 5th cpu. > > static void gic_update_vlpi_properties(void) > { > gic_iterate_rdists(__gic_update_vlpi_properties); > > } > > We can solve this problem by mapping all eight redistributor in dt, > but ideally code should also able to handle this and we can avoid > mappin? The whole point of DT is to describe the HW, all the HW, nothing but the HW. This is what is expected by both the architecture and Linux. So you have the solution already. Don't lie to the kernel, and everything will be fine. M.
On 12/5/2019 6:48 PM, Marc Zyngier wrote: > On 2019-12-05 13:01, Gaurav Kohli wrote: >> On 12/5/2019 6:17 PM, Marc Zyngier wrote: >>> Hi Gaurav, >>> On 2019-12-05 10:55, Gaurav Kohli wrote: >>>> As per GIC specification, we can configure gic for more no of cpus >>>> then the available cpus in the soc, But this can cause mem abort >>>> while iterating lpi region for non existent cpu as we don't map >>> Which LPI region? We're talking about RDs, right... Or does LPI mean >>> something other than GIC LPIs for you? >>> >> >> Yes RDs only. >>>> redistrubutor region for non-existent cpu. >>>> >>>> To avoid this issue, put one more check of valid mpidr. >>> Sorry, but I'm not sure I grasp your problem. Let me try and rephrase >>> it: >>> - Your GIC is configured for (let's say) 8 CPUs, and your SoC has >>> only 4. >> Yes, suppose gic is configured for 8 cpus but soc has only 4 cpus. >> Then in this case gic_iterate will iterate till it get TYPER_LAST. > > And that's what is expected from the architecture. > >> >> But as gic is configured for 8, So last bit sets in eight >> redistributor regions only. >>> - As part of the probing, the driver iterates on the RD regions and >>> explodes >>> because something isn't mapped? >>> That'd be a grave bug, but I believe the issue is somewhere else. >> >> There are 4 cpus present, that's why we have mapped 4 redistributor >> only, but during probe below function keeps iterating and give mem >> abort for 5th cpu. >> >> static void gic_update_vlpi_properties(void) >> { >> gic_iterate_rdists(__gic_update_vlpi_properties); >> >> } >> >> We can solve this problem by mapping all eight redistributor in dt, >> but ideally code should also able to handle this and we can avoid >> mappin? > > The whole point of DT is to describe the HW, all the HW, nothing but > the HW. This is what is expected by both the architecture and Linux. > > So you have the solution already. Don't lie to the kernel, and everything > will be fine. > > M. HI Marc, Thanks for detailed explanation, Yes we have mapped all 8 distributors now to resolve. But my main concern is that last 4 redistributor is not connected to core, as core is not present. And as per gic driver it seems we are only iterating and populating per cpu rd pointer. So that would be fine correct, seems nothing wrong in this kind of configuration?
On 2019-12-06 08:44, Gaurav Kohli wrote: > On 12/5/2019 6:48 PM, Marc Zyngier wrote: >> On 2019-12-05 13:01, Gaurav Kohli wrote: >>> On 12/5/2019 6:17 PM, Marc Zyngier wrote: >>>> Hi Gaurav, >>>> On 2019-12-05 10:55, Gaurav Kohli wrote: >>>>> As per GIC specification, we can configure gic for more no of >>>>> cpus >>>>> then the available cpus in the soc, But this can cause mem abort >>>>> while iterating lpi region for non existent cpu as we don't map >>>> Which LPI region? We're talking about RDs, right... Or does LPI >>>> mean >>>> something other than GIC LPIs for you? >>>> >>> >>> Yes RDs only. >>>>> redistrubutor region for non-existent cpu. >>>>> >>>>> To avoid this issue, put one more check of valid mpidr. >>>> Sorry, but I'm not sure I grasp your problem. Let me try and >>>> rephrase it: >>>> - Your GIC is configured for (let's say) 8 CPUs, and your SoC has >>>> only 4. >>> Yes, suppose gic is configured for 8 cpus but soc has only 4 cpus. >>> Then in this case gic_iterate will iterate till it get TYPER_LAST. >> And that's what is expected from the architecture. >> >>> >>> But as gic is configured for 8, So last bit sets in eight >>> redistributor regions only. >>>> - As part of the probing, the driver iterates on the RD regions >>>> and explodes >>>> because something isn't mapped? >>>> That'd be a grave bug, but I believe the issue is somewhere else. >>> >>> There are 4 cpus present, that's why we have mapped 4 redistributor >>> only, but during probe below function keeps iterating and give mem >>> abort for 5th cpu. >>> >>> static void gic_update_vlpi_properties(void) >>> { >>> gic_iterate_rdists(__gic_update_vlpi_properties); >>> >>> } >>> >>> We can solve this problem by mapping all eight redistributor in dt, >>> but ideally code should also able to handle this and we can avoid >>> mappin? >> The whole point of DT is to describe the HW, all the HW, nothing but >> the HW. This is what is expected by both the architecture and Linux. >> So you have the solution already. Don't lie to the kernel, and >> everything >> will be fine. >> M. > > HI Marc, > > Thanks for detailed explanation, Yes we have mapped all 8 > distributors now to resolve. > But my main concern is that last 4 redistributor is not connected to > core, as core is not present. > And as per gic driver it seems we are only > iterating and populating per cpu rd pointer. > > So that would be fine correct, seems nothing wrong in this kind of > configuration? There is nothing wrong with having more redistributors that CPUs, and that's what is anticipated by the architecture. This is also why the GIC driver works by having each CPU finding its own redistributor in the RD regions, rather than the other way around. M.
Hi Gaurav,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on tip/irq/core]
[also build test ERROR on v5.5-rc1 next-20191209]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Gaurav-Kohli/irqchip-gic-v3-Avoid-check-of-lpi-configuration-for-non-existent-cpu/20191207-092729
base: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 407e62f52aadd8124dcba407f18a03aedce9b86a
config: arm-multi_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.5.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers//irqchip/irq-gic-v3.c: In function 'gic_iterate_rdists':
>> drivers//irqchip/irq-gic-v3.c:801:30: error: 'INVALID_HWID' undeclared (first use in this function); did you mean 'INVALID_HWIRQ'?
cpu_logical_map(cpu) != INVALID_HWID);
^~~~~~~~~~~~
INVALID_HWIRQ
drivers//irqchip/irq-gic-v3.c:801:30: note: each undeclared identifier is reported only once for each function it appears in
vim +801 drivers//irqchip/irq-gic-v3.c
764
765 static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *))
766 {
767 int ret = -ENODEV;
768 int i;
769 int cpu = 0;
770
771 for (i = 0; i < gic_data.nr_redist_regions; i++) {
772 void __iomem *ptr = gic_data.redist_regions[i].redist_base;
773 u64 typer;
774 u32 reg;
775
776 reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK;
777 if (reg != GIC_PIDR2_ARCH_GICv3 &&
778 reg != GIC_PIDR2_ARCH_GICv4) { /* We're in trouble... */
779 pr_warn("No redistributor present @%p\n", ptr);
780 break;
781 }
782
783 do {
784 cpu++;
785 typer = gic_read_typer(ptr + GICR_TYPER);
786 ret = fn(gic_data.redist_regions + i, ptr);
787 if (!ret)
788 return 0;
789
790 if (gic_data.redist_regions[i].single_redist)
791 break;
792
793 if (gic_data.redist_stride) {
794 ptr += gic_data.redist_stride;
795 } else {
796 ptr += SZ_64K * 2; /* Skip RD_base + SGI_base */
797 if (typer & GICR_TYPER_VLPIS)
798 ptr += SZ_64K * 2; /* Skip VLPI_base + reserved page */
799 }
800 } while (!(typer & GICR_TYPER_LAST) &&
> 801 cpu_logical_map(cpu) != INVALID_HWID);
802 }
803
804 return ret ? -ENODEV : 0;
805 }
806
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 1edc993..adc9186 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -766,6 +766,7 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *)) { int ret = -ENODEV; int i; + int cpu = 0; for (i = 0; i < gic_data.nr_redist_regions; i++) { void __iomem *ptr = gic_data.redist_regions[i].redist_base; @@ -780,6 +781,7 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *)) } do { + cpu++; typer = gic_read_typer(ptr + GICR_TYPER); ret = fn(gic_data.redist_regions + i, ptr); if (!ret) @@ -795,7 +797,8 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *)) if (typer & GICR_TYPER_VLPIS) ptr += SZ_64K * 2; /* Skip VLPI_base + reserved page */ } - } while (!(typer & GICR_TYPER_LAST)); + } while (!(typer & GICR_TYPER_LAST) && + cpu_logical_map(cpu) != INVALID_HWID); } return ret ? -ENODEV : 0;
As per GIC specification, we can configure gic for more no of cpus then the available cpus in the soc, But this can cause mem abort while iterating lpi region for non existent cpu as we don't map redistrubutor region for non-existent cpu. To avoid this issue, put one more check of valid mpidr. Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>