From patchwork Tue Jan 7 10:45:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 11320735 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D6B813A0 for ; Tue, 7 Jan 2020 10:45:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0B2F420848 for ; Tue, 7 Jan 2020 10:45:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="MxVGehv5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727887AbgAGKpn (ORCPT ); Tue, 7 Jan 2020 05:45:43 -0500 Received: from mail25.static.mailgun.info ([104.130.122.25]:11081 "EHLO mail25.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727427AbgAGKpn (ORCPT ); Tue, 7 Jan 2020 05:45:43 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1578393942; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=RDAGoBZcP+IIvjulgGM/+lhH6lXI8yZD4vDaBN2zJto=; b=MxVGehv5CacKJ5jmiXyghRsvnVOiGetxd0gYwapHRFo2ocEnU+nxGASXf+2pJNloR8rj93ty tTTP9F+J/4doAkRayODHQVpu0IxOX2dnHwRRQCrZub/etyGCIWYMXUitHxvHLeVTRTiiCai0 rOFsmPb9ux41SCECJR5PP9kaX8E= X-Mailgun-Sending-Ip: 104.130.122.25 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e146155.7f34257a41b8-smtp-out-n02; Tue, 07 Jan 2020 10:45:41 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 8D5A0C447A4; Tue, 7 Jan 2020 10:45:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak) by smtp.codeaurora.org (Postfix) with ESMTPSA id E8889C4479F; Tue, 7 Jan 2020 10:45:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E8889C4479F Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, Rajendra Nayak Subject: [PATCH 1/3] arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients Date: Tue, 7 Jan 2020 16:15:24 +0530 Message-Id: <1578393926-5052-1-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dynamic power coefficients for Silver and Gold CPUs on SC7180 SoC. Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8011c5f..fb78bb8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -86,6 +86,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_0>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -103,6 +104,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_100>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -117,6 +119,7 @@ compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_200>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -131,6 +134,7 @@ compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_300>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -145,6 +149,7 @@ compatible = "arm,armv8"; reg = <0x0 0x400>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_400>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -159,6 +164,7 @@ compatible = "arm,armv8"; reg = <0x0 0x500>; enable-method = "psci"; + dynamic-power-coefficient = <100>; next-level-cache = <&L2_500>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 0>; @@ -173,6 +179,7 @@ compatible = "arm,armv8"; reg = <0x0 0x600>; enable-method = "psci"; + dynamic-power-coefficient = <405>; next-level-cache = <&L2_600>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>; @@ -187,6 +194,7 @@ compatible = "arm,armv8"; reg = <0x0 0x700>; enable-method = "psci"; + dynamic-power-coefficient = <405>; next-level-cache = <&L2_700>; #cooling-cells = <2>; qcom,freq-domain = <&cpufreq_hw 1>;