From patchwork Tue Jan 28 22:00:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 11355251 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 66A02924 for ; Tue, 28 Jan 2020 22:00:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4411424687 for ; Tue, 28 Jan 2020 22:00:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="VRTU1B1E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726569AbgA1WAw (ORCPT ); Tue, 28 Jan 2020 17:00:52 -0500 Received: from mail25.static.mailgun.info ([104.130.122.25]:15103 "EHLO mail25.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726548AbgA1WAu (ORCPT ); Tue, 28 Jan 2020 17:00:50 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1580248849; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=yghdhlFiZU77aOY7g/N4Y1I7xkAvDvSkr40c3b2zObg=; b=VRTU1B1EvqvErOqoVagxjv/Kn4e8vJnur9JlXHBWysIIOkCXPDZI/sRvHpZCZ/LWc6ZknrUE GmiwiKsWAsPTl7PYai3LIIfTi076+8s1vNbVej8LEYrgyCWbHJPnzlie/Q5qCBEzKL5q4Ki8 sE/B16ZT+DU55z1xHH3smXD6iik= X-Mailgun-Sending-Ip: 104.130.122.25 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e30af0e.7f05fe318ae8-smtp-out-n02; Tue, 28 Jan 2020 22:00:46 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E1D3BC433A2; Tue, 28 Jan 2020 22:00:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id 14A37C4479C; Tue, 28 Jan 2020 22:00:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 14A37C4479C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: iommu@lists.linux-foundation.org Cc: robin.murphy@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Sean Paul , Sharat Masetty , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Rob Clark , David Airlie , freedreno@lists.freedesktop.org, Daniel Vetter Subject: [PATCH v5 5/5] drm/msm/a6xx: Support split pagetables Date: Tue, 28 Jan 2020 15:00:19 -0700 Message-Id: <1580248819-12644-6-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580248819-12644-1-git-send-email-jcrouse@codeaurora.org> References: <1580248819-12644-1-git-send-email-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Attempt to enable split pagetables if the arm-smmu driver supports it. This will move the default address space from the default region to the address range assigned to TTBR1. The behavior should be transparent to the driver for now but it gets the default buffers out of the way when we want to start swapping TTBR0 for context-specific pagetables. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 52 ++++++++++++++++++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index a2c5412..9bec603c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -878,6 +878,56 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu) return (unsigned long)busy_time; } +static struct msm_gem_address_space * +a6xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) +{ + struct iommu_domain *iommu = iommu_domain_alloc(&platform_bus_type); + struct msm_gem_address_space *aspace; + struct msm_mmu *mmu; + u64 start, size; + u32 val = 1; + int ret; + + if (!iommu) + return ERR_PTR(-ENOMEM); + + /* + * Try to request split pagetables - the request has to be made before + * the domian is attached + */ + iommu_domain_set_attr(iommu, DOMAIN_ATTR_SPLIT_TABLES, &val); + + mmu = msm_iommu_new(&pdev->dev, iommu); + if (IS_ERR(mmu)) { + iommu_domain_free(iommu); + return ERR_CAST(mmu); + } + + /* + * After the domain is attached, see if the split tables were actually + * successful. + */ + ret = iommu_domain_get_attr(iommu, DOMAIN_ATTR_SPLIT_TABLES, &val); + if (!ret && val) { + /* + * The aperture start will be at the beginning of the TTBR1 + * space so use that as a base + */ + start = iommu->geometry.aperture_start; + size = 0xffffffff; + } else { + /* Otherwise use the legacy 32 bit region */ + start = SZ_16M; + size = 0xffffffff - SZ_16M; + } + + aspace = msm_gem_address_space_create(mmu, "gpu", start, size); + if (IS_ERR(aspace)) + iommu_domain_free(iommu); + + return aspace; +} + static const struct adreno_gpu_funcs funcs = { .base = { .get_param = adreno_get_param, @@ -900,7 +950,7 @@ static const struct adreno_gpu_funcs funcs = { .gpu_state_get = a6xx_gpu_state_get, .gpu_state_put = a6xx_gpu_state_put, #endif - .create_address_space = adreno_iommu_create_address_space, + .create_address_space = a6xx_create_address_space, }, .get_timestamp = a6xx_get_timestamp, };