| Message ID | 1583946863-24308-1-git-send-email-vbadigan@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 557a2aba5b832f80814b8821164108cacc5b0dca |
| Headers | show |
| Series | arm64: dts: qcom: qcs404: Enable CQE support for eMMC | expand |
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index 522d3ef..afe69e8 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -200,6 +200,7 @@ &sdcc1 { status = "ok"; + supports-cqe; mmc-ddr-1_8v; mmc-hs400-1_8v; bus-width = <8>; diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 1eea064..f149a53 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -687,7 +687,7 @@ sdcc1: sdcc@7804000 { compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"; reg = <0x07804000 0x1000>, <0x7805000 0x1000>; - reg-names = "hc_mem", "cmdq_mem"; + reg-names = "hc", "cqhci"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
Enabling CQE support for eMMC by supplying the correct reg name and flag which indicates CQE support. Also remove the redundant _mem suffix for reg names. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 1 + arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)