| Message ID | 1588080785-6812-4-git-send-email-rnayak@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | DVFS for IO devices on sdm845 and sc7180 | expand |
Hi Rajendra, On Tue, Apr 28, 2020 at 07:02:51PM +0530, Rajendra Nayak wrote: > qup has a requirement to vote on the performance state of the CX domain > in sdm845 devices. Add OPP tables for these and also add power-domains > property for all qup instances. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 115 +++++++++++++++++++++++++++++++++++ > 1 file changed, 115 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 8f926b5..36b9fb1 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -804,6 +804,25 @@ > clock-names = "core"; > }; > > + qup_opp_table: qup-opp-table { > + compatible = "operating-points-v2"; > + > + opp-19200000 { > + opp-hz = /bits/ 64 <19200000>; > + required-opps = <&rpmhpd_opp_min_svs>; > + }; > + > + opp-75000000 { > + opp-hz = /bits/ 64 <75000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-100000000 { > + opp-hz = /bits/ 64 <100000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + }; > + Judging from SDM845 (which has more OPP tables) the convention seems to be to add OPP tables to the nodes that use them, which seems reasonable and keeps them out of the device list. Unfortunately this convention isn't completely suitable for cases like this (and the DSI OPPs later in this series), where the same OPP table is used by multiple devices. A possible compromise would be to add the table to the node of the first device that uses them.
On 4/29/2020 5:32 AM, Matthias Kaehlcke wrote: > Hi Rajendra, > > On Tue, Apr 28, 2020 at 07:02:51PM +0530, Rajendra Nayak wrote: >> qup has a requirement to vote on the performance state of the CX domain >> in sdm845 devices. Add OPP tables for these and also add power-domains >> property for all qup instances. >> >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >> Signed-off-by: Stephen Boyd <swboyd@chromium.org> >> --- >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 115 +++++++++++++++++++++++++++++++++++ >> 1 file changed, 115 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> index 8f926b5..36b9fb1 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> @@ -804,6 +804,25 @@ >> clock-names = "core"; >> }; >> >> + qup_opp_table: qup-opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-19200000 { >> + opp-hz = /bits/ 64 <19200000>; >> + required-opps = <&rpmhpd_opp_min_svs>; >> + }; >> + >> + opp-75000000 { >> + opp-hz = /bits/ 64 <75000000>; >> + required-opps = <&rpmhpd_opp_low_svs>; >> + }; >> + >> + opp-100000000 { >> + opp-hz = /bits/ 64 <100000000>; >> + required-opps = <&rpmhpd_opp_svs>; >> + }; >> + }; >> + > > Judging from SDM845 (which has more OPP tables) the convention seems to be > to add OPP tables to the nodes that use them, which seems reasonable and > keeps them out of the device list. > > Unfortunately this convention isn't completely suitable for cases like this > (and the DSI OPPs later in this series), where the same OPP table is used by > multiple devices. A possible compromise would be to add the table to the > node of the first device that uses them. Sounds fair, I will do that and respin. Thanks.
On 4/29/2020 7:45 PM, Rajendra Nayak wrote: > > On 4/29/2020 5:32 AM, Matthias Kaehlcke wrote: >> Hi Rajendra, >> >> On Tue, Apr 28, 2020 at 07:02:51PM +0530, Rajendra Nayak wrote: >>> qup has a requirement to vote on the performance state of the CX domain >>> in sdm845 devices. Add OPP tables for these and also add power-domains >>> property for all qup instances. >>> >>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >>> Signed-off-by: Stephen Boyd <swboyd@chromium.org> >>> --- >>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 115 +++++++++++++++++++++++++++++++++++ >>> 1 file changed, 115 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> index 8f926b5..36b9fb1 100644 >>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> @@ -804,6 +804,25 @@ >>> clock-names = "core"; >>> }; >>> + qup_opp_table: qup-opp-table { >>> + compatible = "operating-points-v2"; >>> + >>> + opp-19200000 { >>> + opp-hz = /bits/ 64 <19200000>; >>> + required-opps = <&rpmhpd_opp_min_svs>; >>> + }; >>> + >>> + opp-75000000 { >>> + opp-hz = /bits/ 64 <75000000>; >>> + required-opps = <&rpmhpd_opp_low_svs>; >>> + }; >>> + >>> + opp-100000000 { >>> + opp-hz = /bits/ 64 <100000000>; >>> + required-opps = <&rpmhpd_opp_svs>; >>> + }; >>> + }; >>> + >> >> Judging from SDM845 (which has more OPP tables) the convention seems to be >> to add OPP tables to the nodes that use them, which seems reasonable and >> keeps them out of the device list. >> >> Unfortunately this convention isn't completely suitable for cases like this >> (and the DSI OPPs later in this series), where the same OPP table is used by >> multiple devices. A possible compromise would be to add the table to the >> node of the first device that uses them. > > Sounds fair, I will do that and respin. Thanks. Looking into this some more, I see we do have.. static const struct of_device_id of_skipped_node_table[] = { { .compatible = "operating-points-v2", }, {} /* Empty terminated list */ }; ..in drivers/of/platform.c, so its not being added to the device list. And atleast in case of qup, I am having to duplicate the OPP tables once for each qup instance. Not to mention, having them inside the first qup device just makes it a little confusing to read who the OPP table belongs to.
On Wed, Apr 29, 2020 at 08:23:30PM +0530, Rajendra Nayak wrote: > > On 4/29/2020 7:45 PM, Rajendra Nayak wrote: > > > > On 4/29/2020 5:32 AM, Matthias Kaehlcke wrote: > > > Hi Rajendra, > > > > > > On Tue, Apr 28, 2020 at 07:02:51PM +0530, Rajendra Nayak wrote: > > > > qup has a requirement to vote on the performance state of the CX domain > > > > in sdm845 devices. Add OPP tables for these and also add power-domains > > > > property for all qup instances. > > > > > > > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > > > > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > > > > --- > > > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 115 +++++++++++++++++++++++++++++++++++ > > > > 1 file changed, 115 insertions(+) > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > > > index 8f926b5..36b9fb1 100644 > > > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > > > @@ -804,6 +804,25 @@ > > > > clock-names = "core"; > > > > }; > > > > + qup_opp_table: qup-opp-table { > > > > + compatible = "operating-points-v2"; > > > > + > > > > + opp-19200000 { > > > > + opp-hz = /bits/ 64 <19200000>; > > > > + required-opps = <&rpmhpd_opp_min_svs>; > > > > + }; > > > > + > > > > + opp-75000000 { > > > > + opp-hz = /bits/ 64 <75000000>; > > > > + required-opps = <&rpmhpd_opp_low_svs>; > > > > + }; > > > > + > > > > + opp-100000000 { > > > > + opp-hz = /bits/ 64 <100000000>; > > > > + required-opps = <&rpmhpd_opp_svs>; > > > > + }; > > > > + }; > > > > + > > > > > > Judging from SDM845 (which has more OPP tables) the convention seems to be > > > to add OPP tables to the nodes that use them, which seems reasonable and > > > keeps them out of the device list. > > > > > > Unfortunately this convention isn't completely suitable for cases like this > > > (and the DSI OPPs later in this series), where the same OPP table is used by > > > multiple devices. A possible compromise would be to add the table to the > > > node of the first device that uses them. > > > > Sounds fair, I will do that and respin. Thanks. > > Looking into this some more, I see we do have.. > > static const struct of_device_id of_skipped_node_table[] = { > { .compatible = "operating-points-v2", }, > {} /* Empty terminated list */ > }; > > ..in drivers/of/platform.c, so its not being added to the device list. sure, I didn't mean that the OPP table is added by the kernel as a device, but that the table breaks with the structure of the DT of device nodes ordered by address. > And atleast in case of qup, I am having to duplicate the OPP tables once for > each qup instance. Not to mention, having them inside the first qup device > just makes it a little confusing to read who the OPP table belongs to. I'm not advocating for duplicating the OPP tables. An alternative to having them in the first QUP device could be to have an dedicated node with shared opp tables outside of the device list, similar to thermal-zones. I tend to like consistency and the sprinkled in OPP tables break with that, but ultimately it's up to Bjorn.
On 4/29/2020 9:40 PM, Matthias Kaehlcke wrote: > On Wed, Apr 29, 2020 at 08:23:30PM +0530, Rajendra Nayak wrote: >> >> On 4/29/2020 7:45 PM, Rajendra Nayak wrote: >>> >>> On 4/29/2020 5:32 AM, Matthias Kaehlcke wrote: >>>> Hi Rajendra, >>>> >>>> On Tue, Apr 28, 2020 at 07:02:51PM +0530, Rajendra Nayak wrote: >>>>> qup has a requirement to vote on the performance state of the CX domain >>>>> in sdm845 devices. Add OPP tables for these and also add power-domains >>>>> property for all qup instances. >>>>> >>>>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >>>>> Signed-off-by: Stephen Boyd <swboyd@chromium.org> >>>>> --- >>>>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 115 +++++++++++++++++++++++++++++++++++ >>>>> 1 file changed, 115 insertions(+) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>>>> index 8f926b5..36b9fb1 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>>>> @@ -804,6 +804,25 @@ >>>>> clock-names = "core"; >>>>> }; >>>>> + qup_opp_table: qup-opp-table { >>>>> + compatible = "operating-points-v2"; >>>>> + >>>>> + opp-19200000 { >>>>> + opp-hz = /bits/ 64 <19200000>; >>>>> + required-opps = <&rpmhpd_opp_min_svs>; >>>>> + }; >>>>> + >>>>> + opp-75000000 { >>>>> + opp-hz = /bits/ 64 <75000000>; >>>>> + required-opps = <&rpmhpd_opp_low_svs>; >>>>> + }; >>>>> + >>>>> + opp-100000000 { >>>>> + opp-hz = /bits/ 64 <100000000>; >>>>> + required-opps = <&rpmhpd_opp_svs>; >>>>> + }; >>>>> + }; >>>>> + >>>> >>>> Judging from SDM845 (which has more OPP tables) the convention seems to be >>>> to add OPP tables to the nodes that use them, which seems reasonable and >>>> keeps them out of the device list. >>>> >>>> Unfortunately this convention isn't completely suitable for cases like this >>>> (and the DSI OPPs later in this series), where the same OPP table is used by >>>> multiple devices. A possible compromise would be to add the table to the >>>> node of the first device that uses them. >>> >>> Sounds fair, I will do that and respin. Thanks. >> >> Looking into this some more, I see we do have.. >> >> static const struct of_device_id of_skipped_node_table[] = { >> { .compatible = "operating-points-v2", }, >> {} /* Empty terminated list */ >> }; >> >> ..in drivers/of/platform.c, so its not being added to the device list. > > sure, I didn't mean that the OPP table is added by the kernel as a device, but > that the table breaks with the structure of the DT of device nodes ordered by > address. Ah ok, got it. > >> And atleast in case of qup, I am having to duplicate the OPP tables once for >> each qup instance. Not to mention, having them inside the first qup device >> just makes it a little confusing to read who the OPP table belongs to. > > I'm not advocating for duplicating the OPP tables. An alternative to having > them in the first QUP device could be to have an dedicated node with shared > opp tables outside of the device list, similar to thermal-zones. That sounds like a good idea too. > I tend to like consistency and the sprinkled in OPP tables break with that, > but ultimately it's up to Bjorn. Bjorn, any thoughts?
On 28-04-20, 17:02, Matthias Kaehlcke wrote: > Judging from SDM845 (which has more OPP tables) the convention seems to be > to add OPP tables to the nodes that use them, which seems reasonable and I don't think that's right. The same DT opp tables are used for multiple CPUs and they are placed outside of any device's node. And that is the reason we have handled that specially in kernel (which Rajendra shared in another email), to not create a platform device for the opp table.
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 8f926b5..36b9fb1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -804,6 +804,25 @@ clock-names = "core"; }; + qup_opp_table: qup-opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x008c0000 0 0x6000>; @@ -825,6 +844,8 @@ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -838,6 +859,8 @@ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -849,6 +872,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart0_default>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -862,6 +887,8 @@ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -875,6 +902,8 @@ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -886,6 +915,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart1_default>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -899,6 +930,8 @@ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -912,6 +945,8 @@ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -923,6 +958,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart2_default>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -936,6 +973,8 @@ interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -949,6 +988,8 @@ interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -960,6 +1001,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart3_default>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -973,6 +1016,8 @@ interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -986,6 +1031,8 @@ interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -997,6 +1044,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart4_default>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1010,6 +1059,8 @@ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1023,6 +1074,8 @@ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1034,6 +1087,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart5_default>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1047,6 +1102,8 @@ interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1060,6 +1117,8 @@ interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1071,6 +1130,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart6_default>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1084,6 +1145,8 @@ interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1097,6 +1160,8 @@ interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1108,6 +1173,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart7_default>; interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; }; @@ -1133,6 +1200,8 @@ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1146,6 +1215,8 @@ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1157,6 +1228,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart8_default>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1170,6 +1243,8 @@ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1183,6 +1258,8 @@ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1194,6 +1271,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart9_default>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1207,6 +1286,8 @@ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1220,6 +1301,8 @@ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1231,6 +1314,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart10_default>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1244,6 +1329,8 @@ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1257,6 +1344,8 @@ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1268,6 +1357,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart11_default>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1281,6 +1372,8 @@ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1294,6 +1387,8 @@ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1305,6 +1400,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart12_default>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1318,6 +1415,8 @@ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1331,6 +1430,8 @@ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1342,6 +1443,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart13_default>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1355,6 +1458,8 @@ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1368,6 +1473,8 @@ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1379,6 +1486,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart14_default>; interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1392,6 +1501,8 @@ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1405,6 +1516,8 @@ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1416,6 +1529,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart15_default>; interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SDM845_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; };