| Message ID | 1588838535-6050-2-git-send-email-sartgarg@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Target specific DLL configuration for qcom SDHC | expand |
On Thu, May 07, 2020 at 01:32:08PM +0530, Sarthak Garg wrote: > Add information regarding DLL register properties for getting target > specific configurations. These DLL register settings may vary from > target to target. > > Also new compatible string value for sm8250 target. > > Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org> > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 5445931..b8e1d2b 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -17,6 +17,7 @@ Required properties: > "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" > "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" > "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4" > + "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5" > "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5" > "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5" > "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; > @@ -46,6 +47,13 @@ Required properties: > "cal" - reference clock for RCLK delay calibration (optional) > "sleep" - sleep clock for RCLK delay calibration (optional) > > +- qcom,ddr-config: Certain chipsets and platforms require particular settings > + for the DDR_CONFIG register. Use this field to specify the register > + value as per the Hardware Programming Guide. > + > +- qcom,dll-config: Chipset and Platform specific value. Use this field to > + specify the DLL_CONFIG register value as per Hardware Programming Guide. Board specific or SoC specific? If the latter, imply this from the compatible string.
On 2020-05-15 08:20, Rob Herring wrote: > On Thu, May 07, 2020 at 01:32:08PM +0530, Sarthak Garg wrote: >> Add information regarding DLL register properties for getting target >> specific configurations. These DLL register settings may vary from >> target to target. >> >> Also new compatible string value for sm8250 target. >> >> Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org> >> --- >> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 14 >> ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt >> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt >> index 5445931..b8e1d2b 100644 >> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt >> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt >> @@ -17,6 +17,7 @@ Required properties: >> "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" >> "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" >> "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4" >> + "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5" >> "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5" >> "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5" >> "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; >> @@ -46,6 +47,13 @@ Required properties: >> "cal" - reference clock for RCLK delay calibration (optional) >> "sleep" - sleep clock for RCLK delay calibration (optional) >> >> +- qcom,ddr-config: Certain chipsets and platforms require particular >> settings >> + for the DDR_CONFIG register. Use this field to specify the register >> + value as per the Hardware Programming Guide. >> + >> +- qcom,dll-config: Chipset and Platform specific value. Use this >> field to >> + specify the DLL_CONFIG register value as per Hardware Programming >> Guide. > > Board specific or SoC specific? If the latter, imply this from the > compatible string. Reposting again as can't find my comment on the https://patchwork.kernel.org/ page. Whatever DLL settings are SOC specific are being taken care with the compatible string. That is the reason we introduced qcom,sm8250-sdhci string. The above listed two configuration can change from board to board as-well.
On Thu, 7 May 2020 at 10:03, Sarthak Garg <sartgarg@codeaurora.org> wrote: > > Add information regarding DLL register properties for getting target > specific configurations. These DLL register settings may vary from > target to target. > > Also new compatible string value for sm8250 target. As Rob indicated, it's a bit confusing to understand the bindings. I think the word "target" is what makes this confusing. I would suggest splitting this patch into two pieces. One that adds the new compatible string for the new variant and another patch that adds the *board specific* dll bindings. That should clarify this. Kind regards Uffe > > Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org> > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 5445931..b8e1d2b 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -17,6 +17,7 @@ Required properties: > "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" > "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" > "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4" > + "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5" > "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5" > "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5" > "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; > @@ -46,6 +47,13 @@ Required properties: > "cal" - reference clock for RCLK delay calibration (optional) > "sleep" - sleep clock for RCLK delay calibration (optional) > > +- qcom,ddr-config: Certain chipsets and platforms require particular settings > + for the DDR_CONFIG register. Use this field to specify the register > + value as per the Hardware Programming Guide. > + > +- qcom,dll-config: Chipset and Platform specific value. Use this field to > + specify the DLL_CONFIG register value as per Hardware Programming Guide. > + > Example: > > sdhc_1: sdhci@f9824900 { > @@ -63,6 +71,9 @@ Example: > > clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; > clock-names = "core", "iface"; > + > + qcom,dll-config = <0x000f642c>; > + qcom,ddr-config = <0x80040868>; > }; > > sdhc_2: sdhci@f98a4900 { > @@ -80,4 +91,7 @@ Example: > > clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; > clock-names = "core", "iface"; > + > + qcom,dll-config = <0x0007642c>; > + qcom,ddr-config = <0x80040868>; > }; > -- > 2.7.4 >
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 5445931..b8e1d2b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -17,6 +17,7 @@ Required properties: "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4" + "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5" "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5" "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5" "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; @@ -46,6 +47,13 @@ Required properties: "cal" - reference clock for RCLK delay calibration (optional) "sleep" - sleep clock for RCLK delay calibration (optional) +- qcom,ddr-config: Certain chipsets and platforms require particular settings + for the DDR_CONFIG register. Use this field to specify the register + value as per the Hardware Programming Guide. + +- qcom,dll-config: Chipset and Platform specific value. Use this field to + specify the DLL_CONFIG register value as per Hardware Programming Guide. + Example: sdhc_1: sdhci@f9824900 { @@ -63,6 +71,9 @@ Example: clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; clock-names = "core", "iface"; + + qcom,dll-config = <0x000f642c>; + qcom,ddr-config = <0x80040868>; }; sdhc_2: sdhci@f98a4900 { @@ -80,4 +91,7 @@ Example: clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; clock-names = "core", "iface"; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; };
Add information regarding DLL register properties for getting target specific configurations. These DLL register settings may vary from target to target. Also new compatible string value for sm8250 target. Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org> --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+)