From patchwork Fri May 22 02:51:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Kumar X-Patchwork-Id: 11564427 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1661C60D for ; Fri, 22 May 2020 02:51:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2C9F207D8 for ; Fri, 22 May 2020 02:51:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="NcX3ZSdh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728199AbgEVCvo (ORCPT ); Thu, 21 May 2020 22:51:44 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:21525 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727080AbgEVCvj (ORCPT ); Thu, 21 May 2020 22:51:39 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1590115898; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=25uisJ5LBVEr8MdaZLkIMYhClh1rhFD8ZG7rSLGaXaw=; b=NcX3ZSdhhE5nsLkm9c3wHIPWM65ZDX0VnaF/jm/ga9G/5mB64jjP3calMvUjADqBHc0TrtAY +CB5OsE9pn08/RcMBtuMboTrfiUHYaCx1/R7WeHiRhgfOUMe5ItKmnP6TyG5R/7Jw/O6cTwh AMynnBvXH5cFEUd5PnkXrnob1/g= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n04.prod.us-west-2.postgun.com with SMTP id 5ec73e3a7c3c9cd0694908ef (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 22 May 2020 02:51:38 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 442DEC433A0; Fri, 22 May 2020 02:51:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: hemantk) by smtp.codeaurora.org (Postfix) with ESMTPSA id 41840C433A1; Fri, 22 May 2020 02:51:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 41840C433A1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=hemantk@codeaurora.org From: Hemant Kumar To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, jhugo@codeaurora.org, bbhatt@codeaurora.org, Hemant Kumar Subject: [PATCH v2 2/3] bus: mhi: core: Move MHI_MAX_MTU to external header file Date: Thu, 21 May 2020 19:51:29 -0700 Message-Id: <1590115890-12278-3-git-send-email-hemantk@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1590115890-12278-1-git-send-email-hemantk@codeaurora.org> References: <1590115890-12278-1-git-send-email-hemantk@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently this macro is defined in internal MHI header as a TRE length mask. Moving it to external header allows MHI client drivers to set this upper bound for the transmit buffer size. Signed-off-by: Hemant Kumar --- include/linux/mhi.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/mhi.h b/include/linux/mhi.h index a39b77d..ce43f74 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -16,6 +16,9 @@ #include #include +/* MHI client drivers to set this upper bound for tx buffer */ +#define MHI_MAX_MTU 0xffff + #define MHI_VOTE_BUS BIT(0) /* do not disable the mhi bus */ #define MHI_VOTE_DEVICE BIT(1) /* prevent mhi device from entering lpm */