| Message ID | 1592818308-23001-3-git-send-email-mkshah@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | irqchip: qcom: pdc: Introduce irq_set_wake call | expand |
Hi, On Mon, Jun 22, 2020 at 2:32 AM Maulik Shah <mkshah@codeaurora.org> wrote: > > Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs > during suspend and mask before setting irq type. > > Masking before changing type should make sure any spurious interrupt > is not detected during this operation. > > Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") > Acked-by: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Maulik Shah <mkshah@codeaurora.org> > --- > drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c > index 2419023..b909ffe 100644 > --- a/drivers/pinctrl/qcom/pinctrl-msm.c > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c > @@ -1143,6 +1143,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) > pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; > pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; > pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; > + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND I haven't tested it, but with my suggestion in patch #4 to use irq_suspend and irq_resume, I presume adding IRQCHIP_MASK_ON_SUSPEND is no longer needed? > + | IRQCHIP_SET_TYPE_MASKED; IIUC adding "IRQCHIP_SET_TYPE_MASKED" is unrelated to the rest of this series, right? -Doug
Hi, On 7/14/2020 3:47 AM, Doug Anderson wrote: > Hi, > > On Mon, Jun 22, 2020 at 2:32 AM Maulik Shah <mkshah@codeaurora.org> wrote: >> Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs >> during suspend and mask before setting irq type. >> >> Masking before changing type should make sure any spurious interrupt >> is not detected during this operation. >> >> Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") >> Acked-by: Linus Walleij <linus.walleij@linaro.org> >> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> >> --- >> drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c >> index 2419023..b909ffe 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-msm.c >> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c >> @@ -1143,6 +1143,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) >> pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; >> pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; >> pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; >> + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND > I haven't tested it, but with my suggestion in patch #4 to use > irq_suspend and irq_resume, I presume adding IRQCHIP_MASK_ON_SUSPEND > is no longer needed? it will still be needed, to let the non wakeup capable IRQ masked during suspend. > > >> + | IRQCHIP_SET_TYPE_MASKED; > IIUC adding "IRQCHIP_SET_TYPE_MASKED" is unrelated to the rest of this > series, right? Right, but since we are adding missing flags, i added it together. Thanks, Maulik > > -Doug
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 2419023..b909ffe 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1143,6 +1143,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND + | IRQCHIP_SET_TYPE_MASKED; np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); if (np) {
Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs during suspend and mask before setting irq type. Masking before changing type should make sure any spurious interrupt is not detected during this operation. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maulik Shah <mkshah@codeaurora.org> --- drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ 1 file changed, 2 insertions(+)