| Message ID | 1593603638-19296-4-git-send-email-rnayak@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | DVFS support for Venus | expand |
On Wed, Jul 01, 2020 at 05:10:38PM +0530, Rajendra Nayak wrote: > Add the OPP tables in order to be able to vote on the performance state > of a power-domain > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++-- > 1 file changed, 33 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index ad57df2..738a741 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -2392,8 +2392,10 @@ > reg = <0 0x0aa00000 0 0xff000>; > interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > power-domains = <&videocc VENUS_GDSC>, > - <&videocc VCODEC0_GDSC>; > - power-domain-names = "venus", "vcodec0"; > + <&videocc VCODEC0_GDSC>, > + <&rpmhpd SC7180_CX>; > + power-domain-names = "venus", "vcodec0", "opp-pd"; > + operating-points-v2 = <&venus_opp_table>; > clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, > <&videocc VIDEO_CC_VENUS_AHB_CLK>, > <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, > @@ -2414,6 +2416,35 @@ > video-encoder { > compatible = "venus-encoder"; > }; > + > + venus_opp_table: venus-opp-table { > + compatible = "operating-points-v2"; > + > + opp-200000000 { > + opp-hz = /bits/ 64 <150000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-320000000 { > + opp-hz = /bits/ 64 <270000000>; > + required-opps = <&rpmhpd_opp_svs>; > + }; > + > + opp-380000000 { > + opp-hz = /bits/ 64 <340000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-444000000 { > + opp-hz = /bits/ 64 <434000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + > + opp-533000000 { > + opp-hz = /bits/ 64 <500000000>; > + required-opps = <&rpmhpd_opp_turbo>; > + }; the labels of the OPP nodes don't match the specified frequencies
On 7/1/2020 10:24 PM, Matthias Kaehlcke wrote: > On Wed, Jul 01, 2020 at 05:10:38PM +0530, Rajendra Nayak wrote: >> Add the OPP tables in order to be able to vote on the performance state >> of a power-domain >> >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++-- >> 1 file changed, 33 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> index ad57df2..738a741 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >> @@ -2392,8 +2392,10 @@ >> reg = <0 0x0aa00000 0 0xff000>; >> interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >> power-domains = <&videocc VENUS_GDSC>, >> - <&videocc VCODEC0_GDSC>; >> - power-domain-names = "venus", "vcodec0"; >> + <&videocc VCODEC0_GDSC>, >> + <&rpmhpd SC7180_CX>; >> + power-domain-names = "venus", "vcodec0", "opp-pd"; >> + operating-points-v2 = <&venus_opp_table>; >> clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, >> <&videocc VIDEO_CC_VENUS_AHB_CLK>, >> <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, >> @@ -2414,6 +2416,35 @@ >> video-encoder { >> compatible = "venus-encoder"; >> }; >> + >> + venus_opp_table: venus-opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-200000000 { >> + opp-hz = /bits/ 64 <150000000>; >> + required-opps = <&rpmhpd_opp_low_svs>; >> + }; >> + >> + opp-320000000 { >> + opp-hz = /bits/ 64 <270000000>; >> + required-opps = <&rpmhpd_opp_svs>; >> + }; >> + >> + opp-380000000 { >> + opp-hz = /bits/ 64 <340000000>; >> + required-opps = <&rpmhpd_opp_svs_l1>; >> + }; >> + >> + opp-444000000 { >> + opp-hz = /bits/ 64 <434000000>; >> + required-opps = <&rpmhpd_opp_nom>; >> + }; >> + >> + opp-533000000 { >> + opp-hz = /bits/ 64 <500000000>; >> + required-opps = <&rpmhpd_opp_turbo>; >> + }; > > the labels of the OPP nodes don't match the specified frequencies Oops, I'll fix and respin.
On Thu, Jul 02, 2020 at 02:26:14PM +0530, Rajendra Nayak wrote: > > On 7/1/2020 10:24 PM, Matthias Kaehlcke wrote: > > On Wed, Jul 01, 2020 at 05:10:38PM +0530, Rajendra Nayak wrote: > > > Add the OPP tables in order to be able to vote on the performance state > > > of a power-domain > > > > > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > > > --- > > > arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++-- > > > 1 file changed, 33 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > > > index ad57df2..738a741 100644 > > > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > > > @@ -2392,8 +2392,10 @@ > > > reg = <0 0x0aa00000 0 0xff000>; > > > interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > > power-domains = <&videocc VENUS_GDSC>, > > > - <&videocc VCODEC0_GDSC>; > > > - power-domain-names = "venus", "vcodec0"; > > > + <&videocc VCODEC0_GDSC>, > > > + <&rpmhpd SC7180_CX>; > > > + power-domain-names = "venus", "vcodec0", "opp-pd"; > > > + operating-points-v2 = <&venus_opp_table>; > > > clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, > > > <&videocc VIDEO_CC_VENUS_AHB_CLK>, > > > <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, > > > @@ -2414,6 +2416,35 @@ > > > video-encoder { > > > compatible = "venus-encoder"; > > > }; > > > + > > > + venus_opp_table: venus-opp-table { > > > + compatible = "operating-points-v2"; > > > + > > > + opp-200000000 { > > > + opp-hz = /bits/ 64 <150000000>; > > > + required-opps = <&rpmhpd_opp_low_svs>; > > > + }; > > > + > > > + opp-320000000 { > > > + opp-hz = /bits/ 64 <270000000>; > > > + required-opps = <&rpmhpd_opp_svs>; > > > + }; > > > + > > > + opp-380000000 { > > > + opp-hz = /bits/ 64 <340000000>; > > > + required-opps = <&rpmhpd_opp_svs_l1>; > > > + }; > > > + > > > + opp-444000000 { > > > + opp-hz = /bits/ 64 <434000000>; > > > + required-opps = <&rpmhpd_opp_nom>; > > > + }; > > > + > > > + opp-533000000 { > > > + opp-hz = /bits/ 64 <500000000>; > > > + required-opps = <&rpmhpd_opp_turbo>; > > > + }; > > > > the labels of the OPP nodes don't match the specified frequencies > > Oops, I'll fix and respin. ping, it seems the respin is still pending
On 7/14/2020 6:06 AM, Matthias Kaehlcke wrote: > On Thu, Jul 02, 2020 at 02:26:14PM +0530, Rajendra Nayak wrote: >> >> On 7/1/2020 10:24 PM, Matthias Kaehlcke wrote: >>> On Wed, Jul 01, 2020 at 05:10:38PM +0530, Rajendra Nayak wrote: >>>> Add the OPP tables in order to be able to vote on the performance state >>>> of a power-domain >>>> >>>> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >>>> --- >>>> arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++-- >>>> 1 file changed, 33 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >>>> index ad57df2..738a741 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >>>> @@ -2392,8 +2392,10 @@ >>>> reg = <0 0x0aa00000 0 0xff000>; >>>> interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; >>>> power-domains = <&videocc VENUS_GDSC>, >>>> - <&videocc VCODEC0_GDSC>; >>>> - power-domain-names = "venus", "vcodec0"; >>>> + <&videocc VCODEC0_GDSC>, >>>> + <&rpmhpd SC7180_CX>; >>>> + power-domain-names = "venus", "vcodec0", "opp-pd"; >>>> + operating-points-v2 = <&venus_opp_table>; >>>> clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, >>>> <&videocc VIDEO_CC_VENUS_AHB_CLK>, >>>> <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, >>>> @@ -2414,6 +2416,35 @@ >>>> video-encoder { >>>> compatible = "venus-encoder"; >>>> }; >>>> + >>>> + venus_opp_table: venus-opp-table { >>>> + compatible = "operating-points-v2"; >>>> + >>>> + opp-200000000 { >>>> + opp-hz = /bits/ 64 <150000000>; >>>> + required-opps = <&rpmhpd_opp_low_svs>; >>>> + }; >>>> + >>>> + opp-320000000 { >>>> + opp-hz = /bits/ 64 <270000000>; >>>> + required-opps = <&rpmhpd_opp_svs>; >>>> + }; >>>> + >>>> + opp-380000000 { >>>> + opp-hz = /bits/ 64 <340000000>; >>>> + required-opps = <&rpmhpd_opp_svs_l1>; >>>> + }; >>>> + >>>> + opp-444000000 { >>>> + opp-hz = /bits/ 64 <434000000>; >>>> + required-opps = <&rpmhpd_opp_nom>; >>>> + }; >>>> + >>>> + opp-533000000 { >>>> + opp-hz = /bits/ 64 <500000000>; >>>> + required-opps = <&rpmhpd_opp_turbo>; >>>> + }; >>> >>> the labels of the OPP nodes don't match the specified frequencies >> >> Oops, I'll fix and respin. > > ping, it seems the respin is still pending I was waiting on Rob to first ack the bindings update patch [1] before I respin these, however I have not seen a response from Rob on the bindings patch yet, despite a couple pings. So I'll respin this series anyway. [1] https://lore.kernel.org/patchwork/patch/1241077/
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ad57df2..738a741 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2392,8 +2392,10 @@ reg = <0 0x0aa00000 0 0xff000>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&videocc VENUS_GDSC>, - <&videocc VCODEC0_GDSC>; - power-domain-names = "venus", "vcodec0"; + <&videocc VCODEC0_GDSC>, + <&rpmhpd SC7180_CX>; + power-domain-names = "venus", "vcodec0", "opp-pd"; + operating-points-v2 = <&venus_opp_table>; clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, <&videocc VIDEO_CC_VENUS_AHB_CLK>, <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, @@ -2414,6 +2416,35 @@ video-encoder { compatible = "venus-encoder"; }; + + venus_opp_table: venus-opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <150000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-320000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-380000000 { + opp-hz = /bits/ 64 <340000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-444000000 { + opp-hz = /bits/ 64 <434000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + + opp-533000000 { + opp-hz = /bits/ 64 <500000000>; + required-opps = <&rpmhpd_opp_turbo>; + }; + }; }; videocc: clock-controller@ab00000 {
Add the OPP tables in order to be able to vote on the performance state of a power-domain Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-)