From patchwork Thu Jul 16 11:35:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 11667209 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D33517C5 for ; Thu, 16 Jul 2020 11:36:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B0F1206C1 for ; Thu, 16 Jul 2020 11:36:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728142AbgGPLgJ (ORCPT ); Thu, 16 Jul 2020 07:36:09 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:35028 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726515AbgGPLgG (ORCPT ); Thu, 16 Jul 2020 07:36:06 -0400 Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 16 Jul 2020 04:36:06 -0700 Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 16 Jul 2020 04:36:04 -0700 Received: from kalyant-linux.qualcomm.com ([10.204.66.210]) by ironmsg02-blr.qualcomm.com with ESMTP; 16 Jul 2020 17:05:38 +0530 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 0740C4B0D; Thu, 16 Jul 2020 17:05:37 +0530 (IST) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Krishna Manikandan , linux-kernel@vger.kernel.org, robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@chromium.org, dianders@chromium.org, jsanka@codeaurora.org, travitej@codeaurora.org, nganji@codeaurora.org Subject: [PATCH 1/3] arm64: dts: sc7180: add interconnect bindings for display Date: Thu, 16 Jul 2020 17:05:32 +0530 Message-Id: <1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Krishna Manikandan This change adds the interconnect bindings to the MDSS node. This will establish Display to DDR path for bus bandwidth voting. Changes in v2: - Change in commit message(Matthias Kaehlcke) Changes in v3: - Updated commit message to include reviewer's name in v2 Signed-off-by: Krishna Manikandan Reviewed-by: Rob Clark --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 998f101..4f2c0d1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1522,6 +1522,9 @@ interrupt-controller; #interrupt-cells = <1>; + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; + interconnect-names = "mdp0-mem"; + iommus = <&apps_smmu 0x800 0x2>; #address-cells = <2>;