From patchwork Mon Aug 3 08:57:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Hsiung Wang X-Patchwork-Id: 11697611 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8DE31913 for ; Mon, 3 Aug 2020 08:57:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 751312070A for ; Mon, 3 Aug 2020 08:57:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Qbx+M2M6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726585AbgHCI5q (ORCPT ); Mon, 3 Aug 2020 04:57:46 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:10775 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725806AbgHCI5m (ORCPT ); Mon, 3 Aug 2020 04:57:42 -0400 X-UUID: 84349119848348c5bae72a879c42f07b-20200803 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=fPWsFbLSz9VhS0OLeT45kMuZ4kCWME6UPnLlJF67d3Y=; b=Qbx+M2M6uWZC3F69MI+vhimedN2Vthdf4CbtFLiar3B2zc+ioDYLEUNZnuMwoPJKC4apJUOJNSUQiUJSiEVspQvW4CsVqh4sHs74xaXDN72+mTjcI6hDZ9pZpKsN7oOc9Zj/5swq2eQex+xrNGkez0RDymoOOqjLxX7mIxGQ9tk=; X-UUID: 84349119848348c5bae72a879c42f07b-20200803 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 494065863; Mon, 03 Aug 2020 16:57:38 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 Aug 2020 16:57:35 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 3 Aug 2020 16:57:35 +0800 From: Hsin-Hsiung Wang To: Mark Brown , Rob Herring , Matthias Brugger CC: Liam Girdwood , Stephen Boyd , Hsin-Hsiung Wang , , , , , , Subject: [PATCH 2/3] regulator: bindings: Add document for MT6315 regulator Date: Mon, 3 Aug 2020 16:57:26 +0800 Message-ID: <1596445047-2975-3-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1596445047-2975-1-git-send-email-hsin-hsiung.wang@mediatek.com> References: <1596445047-2975-1-git-send-email-hsin-hsiung.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device tree binding information for mt6315 regulator driver. Example bindings for mt6315 are added. Signed-off-by: Hsin-Hsiung Wang --- .../bindings/regulator/mt6315-regulator.txt | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mt6315-regulator.txt diff --git a/Documentation/devicetree/bindings/regulator/mt6315-regulator.txt b/Documentation/devicetree/bindings/regulator/mt6315-regulator.txt new file mode 100644 index 0000000..1c14537 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mt6315-regulator.txt @@ -0,0 +1,45 @@ +Mediatek MT6315 Regulator + +Required properties: +- compatible: Must be one of the following. + "mediatek,mt6315_3-regulator" + "mediatek,mt6315_6-regulator" + "mediatek,mt6315_7-regulator" +- reg: SPMI slave id. +- regulators: List of regulators provided by this controller. + The definition for each of these nodes is defined using the standard binding + for regulators at Documentation/devicetree/bindings/regulator/regulator.txt. + +The valid names for regulators are: +BUCK: + vbuck1, vbuck3, vbuck4 + +Example: + mt6315_3: mt6315@3 { + compatible = "mediatek,mt6315_3-regulator"; + reg = <0x3 0 0xb 1>; + + mt6315_3_vbuck1: vbuck1 { + regulator-compatible = "vbuck1"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2 4>; + }; + + mt6315_3_vbuck3: vbuck3 { + regulator-compatible = "vbuck3"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2 4>; + }; + + mt6315_3_vbuck3: vbuck3 { + regulator-compatible = "vbuck3"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1193750>; + regulator-enable-ramp-delay = <256>; + regulator-allowed-modes = <0 1 2 4>; + }; + };