Message ID | 1630346073-7099-4-git-send-email-sanm@codeaurora.org (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | USB DWC3 QCOM Multi power domain support | expand |
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 53a21d0..7ccccb7 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1374,7 +1374,10 @@ interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; - power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + power-domains = <&rpmhpd SC7280_CX>, <&gcc GCC_USB30_PRIM_GDSC>; + power-domain-names = "cx", "usb_gdsc"; + + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_USB30_PRIM_BCR>;
Add multi pd support to set performance state for cx domain to maintain minimum corner voltage for USB clocks. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)