From patchwork Tue Mar 8 16:54:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Polimera X-Patchwork-Id: 12774068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46AF5C433FE for ; Tue, 8 Mar 2022 16:55:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348308AbiCHQ4X (ORCPT ); Tue, 8 Mar 2022 11:56:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348509AbiCHQ4U (ORCPT ); Tue, 8 Mar 2022 11:56:20 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32B1B4ECF9; Tue, 8 Mar 2022 08:55:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646758523; x=1678294523; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=a4IaeSXwSBvcS1QBXci/iCU3y5fDAD+ThP2vZLPD1Hg=; b=D7vValmJkOOb+0f51zb51jZaCxtg/H0//rHquw3HZtryLWlicc1SQuHw 5PmwYTDRb5HlTupD/1i9+R9W8Tqi2B3+ImTXwLVTpjGYWG/u5GvyoTYJE 2cBNh0r8Ep19shZrhDRbfHh0aQS5J4/8OhwTtIDWLnYK0gZF40/NzyJLD I=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 08 Mar 2022 08:55:23 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 08 Mar 2022 08:55:21 -0800 X-QCInternal: smtphost Received: from vpolimer-linux.qualcomm.com ([10.204.67.235]) by ironmsg02-blr.qualcomm.com with ESMTP; 08 Mar 2022 22:25:03 +0530 Received: by vpolimer-linux.qualcomm.com (Postfix, from userid 463814) id 7621E53EF; Tue, 8 Mar 2022 22:25:02 +0530 (IST) From: Vinod Polimera To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Vinod Polimera , linux-kernel@vger.kernel.org, robdclark@gmail.com, dianders@chromium.org, swboyd@chromium.org, quic_kalyant@quicinc.com Subject: [PATCH v5 4/5] arm64/dts/qcom/sm8250: remove assigned-clock-rate property for mdp clk Date: Tue, 8 Mar 2022 22:24:59 +0530 Message-Id: <1646758500-3776-5-git-send-email-quic_vpolimer@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646758500-3776-1-git-send-email-quic_vpolimer@quicinc.com> References: <1646758500-3776-1-git-send-email-quic_vpolimer@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Kernel clock driver assumes that initial rate is the max rate for that clock and was not allowing it to scale beyond the assigned clock value. Drop the assigned clock rate property and vote on the mdp clock as per calculated value during the usecase. Fixes: 7c1dffd471("arm64: dts: qcom: sm8250.dtsi: add display system nodes") Signed-off-by: Vinod Polimera Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303..2105eb7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3164,9 +3164,6 @@ <&dispcc DISP_CC_MDSS_MDP_CLK>; clock-names = "iface", "bus", "nrt_bus", "core"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; - assigned-clock-rates = <460000000>; - interrupts = ; interrupt-controller; #interrupt-cells = <1>; @@ -3191,10 +3188,8 @@ <&dispcc DISP_CC_MDSS_VSYNC_CLK>; clock-names = "iface", "bus", "core", "vsync"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates = <460000000>, - <19200000>; + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; power-domains = <&rpmhpd SM8250_MMCX>;