diff mbox series

[v11,2/4] arm64: dts: qcom: sc7280: Add MI2S pinmux specifications for CRD 3.0/3.1

Message ID 1650957666-6266-3-git-send-email-quic_srivasam@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add lpass pin control support for audio on sc7280 based targets | expand

Commit Message

Srinivasa Rao Mandadapu April 26, 2022, 7:21 a.m. UTC 
Add drive strength property for primary and secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 34 ++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Matthias Kaehlcke April 26, 2022, 9:58 p.m. UTC | #1 
On Tue, Apr 26, 2022 at 12:51:04PM +0530, Srinivasa Rao Mandadapu wrote:

> Subject: arm64: dts: qcom: sc7280: Add MI2S pinmux specifications for CRD 3.0/3.1 
>
> Add drive strength property for primary and secondary MI2S on
> sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.

The subject and the commit message are misleading. What this
change does is to configure these setting for all herobrine
based boards, not only the CRD rev5+.

That doesn't seem correct. The setting may be similar across
boards, but they aren't necessarily the same, especially for
the drive strength. One could argue that mi2s0 and the wcd9385
are on the qcard and hence the config should be in
sc7280-qcard.dtsi, however not all qcard based boards use the
wcd9385, so the config shouldn't be shared across all of them.
Please move it to sc7280-herobrine-crd.dts
Srinivasa Rao Mandadapu April 27, 2022, 5:03 p.m. UTC | #2 
On 4/27/2022 3:28 AM, Matthias Kaehlcke wrote:
Thanks for your time Matthias!!!
> On Tue, Apr 26, 2022 at 12:51:04PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> Subject: arm64: dts: qcom: sc7280: Add MI2S pinmux specifications for CRD 3.0/3.1
>>
>> Add drive strength property for primary and secondary MI2S on
>> sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.
> The subject and the commit message are misleading. What this
> change does is to configure these setting for all herobrine
> based boards, not only the CRD rev5+.
>
> That doesn't seem correct. The setting may be similar across
> boards, but they aren't necessarily the same, especially for
> the drive strength. One could argue that mi2s0 and the wcd9385
> are on the qcard and hence the config should be in
> sc7280-qcard.dtsi, however not all qcard based boards use the
> wcd9385, so the config shouldn't be shared across all of them.
> Please move it to sc7280-herobrine-crd.dts
Okay. Will do accordingly.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index d58045d..4c4a0e9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -588,6 +588,40 @@  ap_ec_spi: &spi10 {
 	bias-disable;
 };
 
+&mi2s0_data0 {
+	drive-strength = <6>;
+};
+
+&mi2s0_data1 {
+	drive-strength = <6>;
+};
+
+&mi2s0_mclk {
+	drive-strength = <6>;
+};
+
+&mi2s0_sclk {
+	drive-strength = <6>;
+};
+
+&mi2s0_ws {
+	drive-strength = <6>;
+};
+
+&mi2s1_data0 {
+	drive-strength = <6>;
+	bias-disable;
+};
+
+&mi2s1_sclk {
+	drive-strength = <6>;
+	bias-disable;
+};
+
+&mi2s1_ws {
+	drive-strength = <6>;
+};
+
 &pcie1_clkreq_n {
 	bias-pull-up;
 	drive-strength = <2>;